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LMH6503MT/NOPB датащи(PDF) 2 Page - Texas Instruments |
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LMH6503MT/NOPB датащи(HTML) 2 Page - Texas Instruments |
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2 / 33 page ![]() +VIN +5V VG R1 50: R2 50: RG 170: RF 1k: RL 100: 6 5 4 3 12 10 9 11 -VIN LMH6503 1 14 8 7 2 VOUT -5V 13 NC -1.2 -0.8 -0.4 0 0.4 0.8 VG (V) -80 -70 -60 -50 -40 -30 30 1.2 -20 -10 0 10 20 0 1 2 3 4 5 11 6 7 8 9 10 VIN_DIFF = ±0.1V dB V/V -40°C 25°C 85°C -40°C 25°C 85°C LMH6503 SNOSA78E – OCTOBER 2003 – REVISED APRIL 2013 www.ti.com Figure 1. Gain vs. VG for Various Temperature Typical Application Figure 2. AVMAX = 10V/V These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6503 |
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