LM95071, LM95071-Q1

SNIS137D – AUGUST 2004 – REVISED SEPTEMBER 2013

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FUNCTIONAL DESCRIPTION

The LM95071/LM95071-Q1 temperature sensor incorporates a temperature sensor and 13-bit-plus-sign

ΔΣ ADC

(Delta-Sigma Analog-to-Digital Converter). Compatibility of the LM95071/LM95071-Q1's three-wire serial

interface with SPI and MICROWIRE allows simple communications with common microcontrollers and

processors.

Shutdown

mode

can

be

used

to

optimize

current

drain

for

different

applications.

A

Manufacturer/Device ID register identifies the LM95071/LM95071-Q1 as a Texas Instruments product.

POWER UP AND POWER DOWN

The LM95071/LM95071-Q1 always powers up in a known state and in the continuous conversion mode.

Immediately after power up, the LM95071/LM95071-Q1 will output an erroneous code until the first temperature

conversion has completed.

When the supply voltage is less than about 1.6V (typical), the LM95071/LM95071-Q1 is considered powered

down. As the supply voltage rises above the nominal 1.6V power up threshold, the internal registers are reset to

the power up default state described above.

SERIAL BUS INTERFACE

The LM95071/LM95071-Q1 operates as a slave and is compatible with SPI or MICROWIRE bus specifications.

Data is clocked out on the falling edge of the serial clock (SC), while data is clocked in on the rising edge of SC.

A complete communication is framed by falling and rising chip select (CS) signal. The CS signal should be held

high for at least one clock cycle (160 ns minimum) between communications. The transmit-only communication

(register read) consists of 16 clock cycles. A complete transmit/receive communication will consist of 32 serial

clocks (see SERIAL BUS TIMING DIAGRAMS). The first 16 clocks comprise the transmit phase of

communication, while the second 16 clocks are the receive phase.

When CS is high SI/O will be in TRI-STATE. Communication should be initiated by taking chip select (CS) low.

This should not be done when SC is changing from a low to high state. Once CS is low the serial I/O pin (SI/O)

will transmit the first bit of data. The master can then read this bit with the rising edge of SC. The remainder of

the data will be clocked out by the falling edge of SC. CS can be taken high at any time during the transmit

phase. If CS is brought low in the middle of a conversion the LM95071/LM95071-Q1 will complete the conversion

and the output shift register will be updated after CS is brought back high.

The receive phase of a communication starts after 16 SC periods. CS can remain low for 32 SC cycles. The

LM95071/LM95071-Q1 will read the data available on the SI/O line on the rising edge of the serial clock. Input

data is to an 8-bit shift register. The part will detect the last eight bits shifted into the register. The receive phase

can last up to 16 SC periods. All ones must be shifted in order to place the part into shutdown. All zeros must be

shifted in order to place the LM95071/LM95071-Q1 into continuous conversion mode. Only the following codes

should be transmitted to the LM95071/LM95071-Q1:

•

00 hex for continuous conversion

•

FF hex for shutdown

Another code may place the part into a test mode. Test modes are used by Texas Instruments to thoroughly test

the function of the LM95071/LM95071-Q1 during production testing. Only eight bits have been defined above

since only the last eight transmitted are detected by the LM95071/LM95071-Q1, before CS is taken HIGH.

The following communication can be used to determine the Manufacturer's/Device ID and then immediately place

the part into continuous conversion mode. With CS continuously low:

•

Read 16 bits of temperature data

•

Write 16 bits of data commanding shutdown

•

Read 16 bits of Manufacture's/Device ID data

•

Write 8 to 16 bits of data commanding Conversion Mode

•

Take CS HIGH.

Note that 228 ms (max) will have to pass for a conversion to complete before the LM95071/LM95071-Q1 actually

transmits temperature data.

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