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TUSB5052PZ датащи(PDF) 15 Page - Texas Instruments

номер детали TUSB5052PZ
подробное описание детали  USB TO 2-SERIAL PORT CONTROLLER WITH CONFIGURABLE OPTIONAL HUB
PDF  82 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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TUSB5052PZ датащи(HTML) 15 Page - Texas Instruments

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3−3
Table 3−1. Controller Pin Description (100-Pin TQFP) (Continued)
NAME
PIN NO.
I/O
NOTES
3/5V
(see Note 9)
DESCRIPTION
2-SIN
81
I
(2)(3)
UART2: Serial input data
2-DCD
80
I
UART2: Data carrier detect
2-DSR
79
I
UART2: Data set ready
2-CTS
78
I
UART2: Clear to send
2-RI
77
I
UART2: Ring indicator
GPIO[7:0]
75−72,
70−68,
66
I/O
(5)
Y
General-purpose bidirectional port
GPO1
63
O
(5)
Y
General-purpose output port 1 (low active)
GPO2
61
O
(5)
Y
General-purpose output port 2 (low active)
GPO3
65
O
(5)
Y
General-purpose output port 3 (low active)
GPI3
59
I
(5)
Y
General-purpose input port 3 (low active)
GPI4
58
I
(5)
Y
General-purpose input port 4
GPI5
57
I
(5)
Y
General-purpose input port 5
GPI6
60
I
(5)
Y
General-purpose input port 6 (low active)
GPI7
56
I
(5)
Y
General-purpose input port 7
SDA
28
I/O
(1)(2)(3)
T
Master I2C controller: data signal
SCL
27
O
(8)
T
Master I2C controller: clock signal
CLKO
97
O
(1)
Programmable clock output (see GLOBCTL: global control register)
WAKEUP
96
I
(2)(3)
T
Remote wake-up request bit. When low, wakes up system
X2
99
O
6-MHz crystal output
X1
100
I
6-MHz crystal input or clock input
TRST
51
I
(3)
Test reset input (left open in normal operation)
RSTI
29
I
(2)
T
Controller master reset signal
RSTO
30
O
(7)
Y
Reset output (see GLOBCTL: global control register)
TEST0
54
I
(3)
Test inputs (tied to VCC in normal operation)
TEST1
53
I
(3)
Test inputs (tied to VCC in normal operation)
TEST2
52
I
(3)
Test inputs (tied to VCC in normal operation)
GND
4, 10,
16, 33,
46, 62,
71, 86,
98
GND
Digital ground
VCC
7, 13,
36, 67,
88
PWR
3.3V
VCCS
38, 55,
76
PWR
5V
NOTES:
1. 3-state CMOS output
2. Schmitt-trigger input
3. 100
µA active pullup
4. Unused downstream ports can be left open or tied to ground.
5.
"14 mA I/O without internal pullup
6. 3-state CMOS output configured to emulate an open drain (without internal pullup). The MCU drives the pin high for two clock cycles
before entering the high-impedance state.
7. Push-pull output
8. Open drain
9. Y indicates 5-V operation. T indicates 5-V tolerance (output is 3.3 V, input can be 3.3 V or 5 V).



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