LPC2104 datasheet(19/32 Pages) PHILIPS

19 / 32 page

Philips Semiconductors

LPC2104/2105/2106

Single-chip 32-bit microcontrollers

Product data

Rev. 04 — 05 February 2004

19 of 32

9397 750 12792

edge controlled PWM outputs require only one match register each, since the

repetition rate is the same for all PWM outputs. Multiple single edge controlled PWM

outputs will all have a rising edge at the beginning of each PWM cycle, when an MR0

match occurs.

Three match registers can be used to provide a PWM output with both edges

controlled. Again, the MR0 match register controls the PWM cycle rate. The other

match registers control the two PWM edge positions. Additional double edge

controlled PWM outputs require only two match registers each, since the repetition

rate is the same for all PWM outputs.

With double edge controlled PWM outputs, speciﬁc match registers control the rising

and falling edge of the output. This allows both positive going PWM pulses (when the

rising edge occurs prior to the falling edge), and negative going PWM pulses (when

the falling edge occurs prior to the rising edge).

6.16.1

Features

• Seven match registers allow up to six single edge controlled or three double edge

controlled PWM outputs, or a mix of both types.

• The match registers also allow:

– Continuous operation with optional interrupt generation on match.

– Stop timer on match with optional interrupt generation.

– Reset timer on match with optional interrupt generation.

• Supports single edge controlled and/or double edge controlled PWM outputs.

Single edge controlled PWM outputs all go HIGH at the beginning of each cycle

unless the output is a constant LOW. Double edge controlled PWM outputs can

have either edge occur at any position within a cycle. This allows for both positive

going and negative going pulses.

• Pulse period and width can be any number of timer counts. This allows complete

ﬂexibility in the trade-off between resolution and repetition rate. All PWM outputs

will occur at the same repetition rate.

• Double edge controlled PWM outputs can be programmed to be either positive

going or negative going pulses.

• Match register updates are synchronized with pulse outputs to prevent generation

of erroneous pulses. Software must “release” new match values before they can

become effective.

• May be used as a standard timer if the PWM mode is not enabled.

• A 32-bit Timer/Counter with a programmable 32-bit Prescaler.

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