LM4849 datasheet(14/19 Pages) NSC

14 / 19 page

Application Information (Continued)

The LM4849’s power dissipation is twice that given by Equa-

tion (2) or Equation (3) when operating in the single-ended

mode or bridge mode, respectively. Twice the maximum

power dissipation point given by Equation (3) must not ex-

ceed the power dissipation given by Equation (4):

DMAX'=(TJMAX −TA)/

(4)

The LM4849’s T

JMAX = 150˚C. In the MH package soldered

to a DAP pad that expands to a copper area of 2in

2 on a

PCB, the LM4849’s

JA is 41˚C/W. At any given ambient

temperature T

A, use Equation (4) to find the maximum inter-

nal power dissipation supported by the IC packaging. Rear-

ranging Equation (4) and substituting P

DMAX for PDMAX' re-

sults in Equation (5). This equation gives the maximum

ambient temperature that still allows maximum stereo power

dissipation without violating the LM4849’s maximum junction

temperature.

A =TJMAX – 2*PDMAX

(5)

For a typical application with a 5V power supply and an 4

Ω

load, the maximum ambient temperature that allows maxi-

mum stereo power dissipation without exceeding the maxi-

mum junction temperature is approximately 45˚C for the MH

package.

JMAX =PDMAX

JA +TA

(6)

Equation (6) gives the maximum junction temperature

JMAX. If the result violates the LM4849’s TJMAX of 150˚C,

reduce the maximum junction temperature by reducing the

power supply voltage or increasing the load resistance. Fur-

ther allowance should be made for increased ambient tem-

peratures.

The above examples assume that a device is a surface

mount part operating around the maximum power dissipation

point. Since internal power dissipation is a function of output

power, higher ambient temperatures are allowed as output

power or duty cycle decreases.

If twice the value given by Equation (3) is greater than that of

Equation (4), then decrease the supply voltage, increase the

load impedance, or reduce the ambient temperature. If these

measures are insufficient, a heat sink can be added to

reduce

JA. The heat sink can be created using additional

copper area around the package, with connections to the

ground pin(s), supply pin and amplifier output pins. External,

solder attached SMT heatsinks such as the Thermalloy

7106D can also improve power dissipation. When adding a

heat sink, the

JA is the sum of

JC,

CS, and

SA.(

JC is the

junction-to-case thermal impedance,

CS is the case-to-sink

thermal impedance, and

SA is the sink-to-ambient thermal

impedance.) Refer to the Typical Performance Character-

istics curves for power dissipation information at lower out-

put power levels.

POWER SUPPLY BYPASSING

As with any power amplifier, proper supply bypassing is

critical for low noise performance and high power supply

rejection. Applications that employ a 5V regulator typically

use a 10 µF in parallel with a 0.1 µF filter capacitor to

stabilize the regulator’s output, reduce noise on the supply

line, and improve the supply’s transient response. However,

their presence does not eliminate the need for a local 1.0 µF

tantalum bypass capacitance connected between the

LM4849’s supply pins and ground. Do not substitute a ce-

ramic capacitor for the tantalum. Doing so may cause oscil-

lation. Keep the length of leads and traces that connect

capacitors between the LM4849’s power supply pin and

ground as short as possible. Connecting a 1µF capacitor,

B, between the BYPASS pin and ground improves the

internal bias voltage’s stability and improves the amplifier’s

PSRR. The PSRR improvements increase as the bypass pin

capacitor value increases. Too large a capacitor, however,

increases turn-on time and can compromise the amplifier’s

click and pop performance. The selection of bypass capaci-

tor values, especially C

B, depends on desired PSRR require-

ments, click and pop performance (as explained in the sec-

tion, Proper Selection of External Components), system

cost, and size constraints.

PROPER SELECTION OF EXTERNAL COMPONENTS

Optimizing the LM4849’s performance requires properly se-

lecting external components. Though the LM4849 operates

well when using external components with wide tolerances,

best performance is achieved by optimizing component val-

ues.

The LM4849 is unity-gain stable, giving a designer maximum

design flexibility. The gain should be set to no more than a

given application requires. This allows the amplifier to

achieve minimum THD+N and maximum signal-to-noise ra-

tio. These parameters are compromised as the closed-loop

gain increases. However, low gain circuits demand input

signals with greater voltage swings to achieve maximum

output power. Fortunately, many signal sources such as

audio CODECs have outputs of 1V

RMS (2.83VP-P). Please

refer to the Audio Power Amplifier Design section for more

information on selecting the proper gain.

Input Capacitor Value Selection

Amplifying the lowest audio frequencies requires a high

value input coupling capacitor (0.33µF in Figure 1). A high

value capacitor can be expensive and may compromise

space efficiency in portable designs. In many cases, how-

ever, the speakers used in portable systems, whether inter-

nal or external, have little ability to reproduce signals below

150Hz. Applications using speakers with this limited fre-

quency response reap little improvement by using a large

input capacitor.

Besides affecting system cost and size, the input coupling

capacitor has an effect on the LM4849’s click and pop per-

formance. When the supply voltage is first applied, a tran-

sient (pop) is created as the charge on the input capacitor

changes from zero to a quiescent state. The magnitude of

the pop is directly proportional to the input capacitor’s size.

Higher value capacitors need more time to reach a quiescent

DC voltage (usually V

DD/2) when charged with a fixed cur-

rent. The amplifier’s output charges the input capacitor

through the feedback resistors, (R1, 2, 7, 8). Thus, pops can

be minimized by selecting an input capacitor value that is no

higher than necessary to meet the desired −3dB frequency.

As shown in Figure 1, the input resistors (R3, 4, 5, 6) and the

input capacitors (CIN = 0.33µF) produce a −6dB high pass

filter cutoff frequency that is found using Equation (7).

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