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CDCM1804RGET датащи(PDF) 12 Page - Texas Instruments

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номер детали CDCM1804RGET
подробное описание детали  1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER
PDF  24 Pages
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CDCM1804RGET датащи(HTML) 12 Page - Texas Instruments

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PARAMETER MEASUREMENT INFORMATION
IN
IN
Y0
Y0
tpd(LH1)
Y1
Y1
tpd(LH2)
tskLVCMOS(o)
Y3
0.5
× VDD3
Y2
Y2
NOTES: A. Output skew, tsk(o), is calculated as the greater of:
− The difference between the fastest and the slowest tpd(LH)n (n = 0…2)
− The difference between the fastest and the slowest tpd(HL)n (n = 0…2)
B. Part-to-part skew, tsk(pp), is calculated as the greater of:
− The difference between the fastest and the slowest tpd(LH)n (n = 0…2 for LVPECL, n = 3 for LVCMOS) across multiple devices
− The difference between the fastest and the slowest tpd(HL)n (n = 0…2 for LVPECL, n = 3 for LVCMOS) across multiple devices
C. Pulse skew, tsk(p), is calculated as the magnitude of the absolute time difference between the high-to-low (tpd(HL) and the low-to-high
(tpd(LH)) propagation delays when a single switching input causes one or more outputs to switch, tsk(p) = | tpd(HL) − tpd(LH) |. Pulse skew
is sometimes referred to as pulse width distortion or duty cycle skew.
T0067-01
|Yn*Yn|
Yn
Yn
VOH
VOL
80%
20%
0 V
tr
tf
VOUT(pp)
T0058-02
CDCM1804
SCAS697E – JULY 2003 – REVISED MAY 2005
Figure 8. Waveforms for Calculation of tsk(o) and tsk(pp)
Figure 9. LVPECL Differential Output Voltage and Rise/Fall Time
12



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