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LM3204 датащи(PDF) 17 Page - Texas Instruments |
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LM3204 датащи(HTML) 17 Page - Texas Instruments |
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17 / 24 page ![]() LM3204 www.ti.com SNVS351C – JUNE 2005 – REVISED APRIL 2013 Table 2. Suggested Capacitors and Suppliers Model Size (EIA) Vendor LMK212BJ475MG 2012 (0805) Taiyo-Yuden C2012X5R1A475K 2012 (0805) TDK C3216X5R1A106K 3216 (1206) TDK The DC bias characteristics of the capacitor must be considered when making the selection. If smaller case size such as 1608 (0603) is selected, the dc bias could reduce the cap value by as much as 40%, in addition to the 20% tolerances and 15% temperature coefficients. Request dc bias curves from manufacturer when making selection. The device has been designed to be stable with output capacitors as low as 3 μF to account for capacitor tolerances. This value includes dc bias reduction, manufacturing tolerances and temp coefficients. The input filter capacitor supplies AC current drawn by the PFET switch of the LM3204 in the first part of each cycle and reduces the voltage ripple imposed on the input power source. A 0.1µF capacitor is also recommended close to VDD pin. The output filter capacitor absorbs the AC inductor current, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR (Equivalent Series Resistance) to perform these functions. The ESR of the filter capacitors is generally a major factor in voltage ripple. DSBGA PACKAGE ASSEMBLY AND USE Use of the DSBGA package requires specialized board layout, precision mounting and careful re-flow techniques, as detailed in TI Application Note 1112 (SNVA009) . Refer to the section Surface Mount Technology (SMD) Assembly Considerations. For best results in assembly, alignment ordinals on the PC board should be used to facilitate placement of the device. The pad style used with DSBGA package must be the NSMD (non- solder mask defined) type. This means that the solder-mask opening is larger than the pad size. This prevents a lip that otherwise forms if the solder-mask and pad overlap, from holding the device off the surface of the board and interfering with mounting. See Application Note 1112 (SNVA009) for specific instructions how to do this. The 10-Bump package used for the LM3204 has 300 micron solder balls and requires 10.82 mil pads for mounting on the circuit board. The trace to each pad should enter the pad with a 90° entry angle to prevent debris from being caught in deep corners. Initially, the trace to each pad should be 6-7 mil wide, for a section approximately 6 mil long or longer, as a thermal relief. Then each trace should neck up or down to its optimal width. The important criterion is symmetry. This ensures the solder bumps on the LM3204 re-flow evenly and that the device solders level to the board. In particular, special attention must be paid to the pads for bumps B3, C3 and D3. Because PGND and PVIN are typically connected to large copper planes, inadequate thermal relief can result in inadequate re-flow of these bumps. The DSBGA package is optimized for the smallest possible size in applications with red or infrared opaque cases. Because the DSBGA package lacks the plastic encapsulation characteristic of larger devices, it is vulnerable to light. Backside metallization and/or epoxy coating, along with front-side shading by the printed circuit board, reduce this sensitivity. However, the package has exposed die edges. In particular, DSBGA devices are sensitive to light, in the red and infrared range, shining on the package’s exposed die edges. Do not use or power-up the LM3204 while subjecting it to high intensity red or infrared light; otherwise degraded, unpredictable or erratic operation may result. Examples of light sources with high red or infrared content include the sun and halogen lamps. Place the device in a case opaque to red or infrared light. BOARD LAYOUT CONSIDERATIONS PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss in the traces. These can send erroneous signals to the DC-DC converter, resulting in poor regulation or instability. Poor layout can also result in re-flow problems leading to poor solder joints between the DSBGA package and board pads. Poor solder joints can result in erratic or degraded performance. Good layout for the LM3204 can by implemented by following a few simple design rules. 1. Place the LM3204 on 10.82 mil pads. As a thermal relief, connect to each pad with a 7 mil wide, approximately 7 mil long traces, and when incrementally increase each trace to its optimal width. The important criterion is symmetry to ensure the solder bumps on the LM3204 re-flow evenly (see DSBGA PACKAGE ASSEMBLY AND USE). 2. Place the LM3204, inductor and filter capacitors close together and make the trace short. The traces Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 17 Product Folder Links: LM3204 |
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