| поискавой системы для электроныых деталей |
|
DP83953 датащи(PDF) 30 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
DP83953 датащи(HTML) 30 Page - National Semiconductor (TI) |
|
30 / 90 page ![]() 4.0 Functional Description (Continued) 30 www.national.com 4.7 Description Of Hardware Connection For Pro- cessor And Display Interface Display Update Cycles The RIC2A possesses control logic and interface pins which may be used to provide status information concern- ing activity on the attached network segments and the cur- rent status of repeater functions. These status cycles are completely autonomous and require only simple support circuitry to produce the data in a form suitable for a light emitting diode "LED" display. The display may be used in one of two modes: 1. Minimum mode - General Repeater Status LEDs 2. Maximum mode - Individual Port Status LEDs Minimum mode, intended for simple LED displays, makes available four status indicators. The first LED denotes whether the RIC2A has been forced to activate its jabber protect functions. The remaining 3 LEDs indicate if any of the RIC2A's network segments are: (1) experiencing a col- lision, (2) receiving data, (3) currently partitioned. When minimum display mode is selected the only external com- ponents required are a 74LS374 type latch, the LEDs and their current limiting resistors. Maximum mode differs from minimum mode by providing display information specific to individual network segments. This information denotes the collision activity, packet reception and partition status of each segment. In the case of 10BASE-T segments the link integrity status and polarity of the received data are also made available. The wide variety of information available in maximum mode may be used in its entirety or in part. This allows the system designer to choose the appropriate complexity of status display commensurate with the specification of the end equipment. The signals provided and their timing relationships have been designed to interface directly with 74LS259 type addressable latches. The number of latches used being depend upon the complexity of the display. Since the latches are octal, a pair is needed to display each type of segment specific data (13 ports means 13 latch bits). The accompanying Table 2 and Table 3 show the function of the interface pins in minimum and maximum modes. Table 4 shows the location of each port's status information when maximum mode is selected. This may be compared with the connection diagram Figure 12. Immediately following the Mode Load Operation (when the MLOAD pin transitions to a high logic state), the display logic performs an LED test operation. This operation lasts one second. While it is in effect, all of the utilized LEDs will blink on. Thus, an installation engineer is able to test the operation of the display by forcing the RIC2A into a reset cycle (MLOAD forced low). The rising edge on the MLOAD pin starts the LED test cycle. During the LED test cycle the RIC2A does not perform packet repetition opera- tions. The status display possesses a capability to lengthen the time an LED is active. At the end of the repetition of a packet, the display is frozen showing the current activity. This freezing lasts for 30 milliseconds or until a subsequent packet is repeated. Thus at low levels of packet activity, the display stretches activity information to make it discernible to the human eye. At high traffic rates the relative bright- ness of the LEDs indicates those segments with high or low activity. It should be mentioned that when the Real Time Interrupt (RTI) occurs, the display update cycle will stop and after RTI is serviced, the display update cycle will resume activ- ity. Table 2. Status Display Pin Functions in Minimum Mode Signal Pin Name Function in MINIMUM MODE D0 No operation D1 Provides status information indicating if there is a collision occurring on one of the segments attached to this RIC2A. D2 Provides status information indicating if one of this RIC2A's ports is receiving a data or collision packet from a segment attached to this RIC2A. D3 Provides status information indicating that the RIC2A has experienced a jabber protect condi- tion. D4 Provides Status information indicating if one of the RIC2A's segments is partitioned. D(7:5) No operation STR0 This signal is the latch enable for the 374 type latch. STR1 This signal is held at a logic one. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |