AD5253 datasheet(22/28 Pages) AD

22 / 28 page

AD5253/AD5254

Rev. 0 | Page 22 of 28

+5V

AD1

AD0

× 4

+5V

R2X

AD1

AD0

N2X

P2Y

P3X

R3X

R3Y

N3Y

AD1

AD0

AD1

AD0

× 4

+5V

× 4

DECODER

× 4

DECODER

× 4

DECODER

× 4

DECODER

Figure 38. Four Devices with AD1 and AD0 of 00

TERMINAL VOLTAGE OPERATION RANGE

The AD5253/AD5254 are designed with internal ESD diodes

for protection; these diodes also set the boundary of the

terminal operating voltages. Positive signals present on terminal

A, B, or W that exceed VDD are clamped by the forward biased

diode. Similarly, negative signals on terminal A, B, or W that are

more negative than VSS are also clamped (see Figure 39). In

practice, users should not operate VAB, VWA, and VWB to be

higher than the voltage across VDD-to-VSS, but VAB, VWA, and VWB

have no polarity constraint.

VDD

VSS

Figure 39. Maximum Terminal Voltages Set by VDD and VSS

POWER-UP AND POWER-DOWN SEQUENCES

Since the ESD protection diodes limit the voltage compliance at

terminals A, B, and W (Figure 39), it is important to power

VDD/VSS before applying any voltage to terminals A, B, and W.

Otherwise, the diodes are forward-biased such that VDD/VSS are

powered unintentionally and may affect the rest of the user’s

circuit. Similarly, VDD/VSS should be powered down last. The

ideal power-up sequence is in the following order: GND, VDD,

VSS, digital inputs, and VA/VB/VW. The order of powering VA, VB,

VW, and the digital inputs is not important, as long as they are

powered after VDD/VSS.

LAYOUT AND POWER SUPPLY BIASING

It is always a good practice to employ a compact, minimum

lead-length layout design. The leads to the input should be as

direct as possible, with a minimum conductor length. Ground

paths should have low resistance and low inductance.

Similarly, it is also good practice to bypass the power supplies

with quality capacitors. Low ESR (equivalent series resistance)

1 µF to 10 µF tantalum or electrolytic capacitors should be

applied at the supplies to minimize any transient disturbance

and filter low frequency ripple. Figure 40 illustrates the basic

supply-bypassing configuration for the AD5253/AD5254.

VDD

VSS

GND

AD5253/AD5254

µF

0.1

µF

0.1

µF

Figure 40. Power Supply Bypassing

The ground pin of the AD5253/AD5254 is used primarily as a

digital ground reference. To minimize the digital ground

bounce, the AD5253/AD5254 ground terminal should be joined

remotely to the common ground (see Figure 40).

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