REV. 0

AD1981A

–8–

Indexed Control Registers

Reg

Name

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

00h

Reset

X

SE4

SE3

SE2

SE1

SE0

ID9

ID8

ID7

ID6

ID5

ID4

ID3

ID2

ID1

ID0

0090h

02h

Master Volume

MM

X

X

LMV4

LMV3

LMV2

LMV1

LMV0

RM*

X

X

RMV4

RMV3

RMV2

RMV1

RMV0

8000h

04h

Headphones Volume

HPM

X

X

LHV4

LHV3

LHV2

LHV1

LHV0

RM*

X

X

RHV4

RHV3

RHV2

RHV1

RHV0

8000h

06h

Mono Volume

MVM

X

X

X

X

X

X

X

X

X

X

MV4

MV2

MV2

MV1

MV0

8000h

0Ch

Phone Volume

PHM

X

X

X

X

X

X

X

X

X

X

PHV4

PHV3

PHV2

PHV1

PHV0

8008h

0Eh

Mic Volume

MCM

X

X

X

X

X

X

X

X

M20

X

MCV4

MCV3

MCV2

MCV1

MCV0

8008h

10h

Line In Volume

LM

X

X

LLV4

LLV3

LLV2

LLV1

LLV0

RM*

X

X

RLV4

RLV3

RLV2

RLV1

RLV0

8808h

12h

CD Volume

CM

X

X

LCV4

LCV3

LCV2

LCV1

LCV0

RM*

X

X

RCV4

RCV3

RCV2

RCV1

RCV0

8808h

16h

AUX Volume

AM

X

X

LAV4

LAV3

LAV2

LAV1

LAV0

RM*

X

X

RAV4

RAV3

RAV2

RAV1

RAV0

8808h

18h

PCM Out Vol

OM

X

X

LOV4

LOV3

LOV2

LOV1

LOV0

RM*

X

X

ROV4

ROV3

ROV2

ROV1

ROV0

8808h

1Ah

Record Select

X

X

X

X

X

LS2

LS1

LS0

X

X

X

X

X

RS2

RS1

RS0

0000h

1Ch

Record Gain

IM

X

X

X

LIM3

LIM2

LIM1

LIM0

RM*

X

X

X

RIM3

RIM2

RIM1

RIM0

8000h

20h

General Purpose

X

X

X

X

X

X

X

X

LPBK X

XXXXX

X

0000h

26h

Power-Down Ctrl/Stat

EAPD

PR6

PR5

PR4

PR3

PR2

PR1

PR0

X

X

X

X

REF

ANL

DAC

ADC

000Xh

28h

Ext’d Audio ID

ID1

ID0

X

X

REV1

REV0

AMAP X

X

X

DSA1

DSA0

X

SPDIF

X

VRA

X605h

2Ah

Ext’d Audio Stat/Ctrl

VFORCE X

X

X

X

SPCV

X

X

X

X

SPSA1

SPSA0

X

SPDIF

X

VRA

0000h

2Ch

PCM Front DAC Rate

SR15

SR14

SR13

SR12

SR11

SR10

SR9

SR8

SR7

SR6

SR5

SR4

SR3

SR2

SR1

SR0

BB80h

(SR1)

32h

PCM L/R ADC Rate

SR15

SR14

SR13

SR12

SR11

SR10

SR9

SR8

SR7

SR6

SR5

SR4

SR3

SR2

SR1

SR0

BB80h

(SR0)

3Ah

SPDIF Control

V

X

SPSR1

SPSR0

L

CC6

CC5

CC4

CC3

CC2

CC1

CC0

PRE

COPY

/AUD

PRO

2000h

60h

EQ CTRL

EQM

MAD

X

X

X

X

X

X

SYM

CHS

BCA5

BCA4

BCA3

BCA2

BCA1

BCA0

8080h

LBEN

62h

EQ DATA

CFD15

CFD14

CFD13

CFD12

CFD11

CFD10

CFD9

CFD8

CFD7 CFD6 CFD5

CFD4

CFD3

CFD2

CFD1

CFD0

0000h

64h

Mixer ADC, Volume

MXM

X

X

X

LMG3

LMG2

LMG1

LMG0

RM*

X

X

X

RMG3

RMG2

RMG1 RMG0

8000h

72h

JACK SENSE

X

X

X

JS

JS

JS

JS1

JS0

JS1

JS0

JS1

JS0

JS1

JS0

JS1

JS0

0000h

MT2

MT1

MT0

EQB

EQB

TMR

TMR

MD

MD

ST

ST

INT

INT

74h

Serial Configuration

SLOT

REGM

REGM

REGM

X

X

X

CHEN

X

X

X

INTS

X

SPAL

SPDZ

SPLNK

7001h

16

2

1

0

76h

Misc Control Bits

DACZ

X

M

X

DAM

X

FMXE X

X

MAD

X

MAD

VREFH VREFD MBG1 MBG0

0000h

SPLT

PD

ST

7Ch

Vendor ID1

F7

F6

F5

F4

F3

F2

F1

F0

S7

S6

S5

S4

S3

S2

S1

S0

4144h

7Eh

Vendor ID2

T7

T6

T5

T4

T3

T2

T1

T0

REV7 REV6 REV5

REV4

REV3

REV2

REV1

REV0

5372h

NOTES

All registers not shown. Bits containing an X are assumed to be reserved.

Odd registers are reserved, not aliased.

Reserved registers should not be written to.

Zeros should be written to bits containing an X.

*For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT Bit Register 76h. The MSPLT bit enables separate mute bits for the left and right

channels. If MSPLT is not set, RM bit has no effect.