CD74ACT297

DIGITAL PHASE-LOCKED LOOP

SCHS297D – AUGUST 1998 – REVISED JUNE 2002

1

POST OFFICE BOX 655303

Significantly Reduced Power Consumption

Compensation Errors

– DC to 110 MHz Typical (K CLK)

– DC to 70 MHz Typical (I/D CLK)

– Standard: XORPD OUT, ECPD OUT

– Bus Driver: I/D OUT

and Circuit Design

MIL-STD-883, Method 3015

description/ordering information

The CD74ACT297 provides a simple, cost-effective solution to high-accuracy, digital, phase-locked-loop

applications. This device contains all the necessary circuits, with the exception of the divide-by-N counter, to

build first-order phase-locked loops as shown in Figure 1.

Both exclusive-OR phase detectors (XORPDs) and edge-controlled (ECPD) phase detectors are provided for

maximum flexibility.

Proper partitioning of the loop function, with many of the building blocks external to the package, makes it easy

for the designer to incorporate ripple cancellation or to cascade to higher-order phase-locked loops.

The length of the up/down K counter is digitally programmable according to the K-counter function table. With

A, B, C, and D all low, the K counter is disabled. With A high and B, C, and D low, the K counter is only three

stages long, which widens the bandwidth, or capture range, and shortens the lock time of the loop. When A,

B, C, and D are programmed high, the K counter becomes 17 stages long, which narrows the bandwidth, or

capture range, and lengthens the lock time. Real-time control of loop bandwidth by manipulating the

A-through-D inputs can maximize the overall performance of the digital phase-locked loop.

ORDERING INFORMATION

TA

PACKAGE†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

55

°Cto125°C

SOIC

M

Tube

CD74ACT297M

ACT297M

–55

°C to 125°C

SOIC – M

Tape and reel

CD74ACT297M96

ACT297M

† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design

guidelines are available at www.ti.com/sc/package.

Copyright

 2002, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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B

A

ENCTR

K CLK

I/D CLK

D/U

I/D OUT

GND

C

D

φA2

ECPD OUT

XORPD OUT

φB

φA1

M PACKAGE

(TOP VIEW)