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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AMC7836IPAP датащи(PDF) 52 Page - Texas Instruments |
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AMC7836IPAP датащи(HTML) 52 Page - Texas Instruments |
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52 / 88 page  52 AMC7836 SLAS986C – NOVEMBER 2014 – REVISED APRIL 2016 www.ti.com Product Folder Links: AMC7836 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated 7.6.4 General Device Configuration: Address 0x10 through 0x17 7.6.4.1 ADC Configuration Register (address = 0x10) [reset = 0x00] Figure 74. ADC Configuration Register (R/W) 7 6 5 4 3 2 1 0 CMODE CONV-RATE[1:0] ADC-REF- BUFF Reserved R/W-0 R/W-00 R/W-0 R/W-All zeros Table 19. ADC Configuration Register Field Descriptions Bit Field Type Reset Description 7 CMODE R/W 0 ADC Conversion Mode Bit. This bit selects the ADC conversion mode. 0: Direct mode. The analog inputs specified in the ADC channel registers are converted sequentially one time. When one set of conversions is complete, the ADC is idle and waits for a new trigger. 1: Auto mode. The analog inputs specified in the AMC channel registers are converted sequentially and repeatedly. When one set of conversions is complete, the ADC multiplexer returns to the first channel and repeats the process. The ADC-UPDATE bit in register 0x0F must be used to initiate the transfer of the latest conversion data to the ADC Data registers. 6-5 CONV-RATE[1:0] R/W 00 ADC Conversion rate. See Table 20 to configure this setting. 4 ADC-REF-BUFF R/W 0 ADC Reference Buffer bit. This bit must be set to 1 after device power-up to enable the internal reference buffer driving the ADC. 0: ADC reference buffer is disabled. 1: ADC reference buffer is enabled. 3-0 Reserved R/W All zeros Reserved for factory use Table 20. CONV-RATE[1:0] Bit Configuration CONV-RATE[1:0] Unipolar Channel Sample Time (µs) Bipolar Channel Sample Time (µs) 00 11.5 34.5 01 23 34.5 10 34.5 34.5 11 69 69 |
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