CC1021-RTR1 datasheet(18/91 Pages) TI1

18 / 91 page

Not Recommended for New Designs NRND

CC1021

SWRS045D – JANUARY 2006 – REVISED JANUARY 2015

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NOTE

The CC1020/1070DK Development Kit with a fully assembled CC1020EMX Evaluation

Module together with the CC1021 specific software should be used for evaluation of the

CC1021 transceiver.

5.4

Microcontroller Interface

Used in a typical system, CC1021 will interface to a microcontroller. This microcontroller must be able to:

•

Program CC1021 into different modes via the 4-wire serial configuration interface (PDI, PDO, PCLK

and PSEL)

•

Interface to the bi-directional synchronous data signal interface (DIO and DCLK)

•

Optionally, the microcontroller can do data encoding / decoding

•

Optionally, the microcontroller can monitor the LOCK pin for frequency lock status, carrier sense status

or other status information.

•

Optionally, the microcontroller can read back the digital RSSI value and other status information via the

4-wire serial interface.

5.4.1

Configuration Interface

The microcontroller interface is shown in Figure 5-3. The microcontroller uses 3 or 4 I/O pins for the

configuration interface (PDI, PDO, PCLK and PSEL). PDO should be connected to a microcontroller input.

PDI, PCLK and PSEL must be microcontroller outputs. One I/O pin can be saved if PDI and PDO are

connected together and a bi-directional pin is used at the microcontroller.

The microcontroller pins connected to PDI, PDO and PCLK can be used for other purposes when the

configuration interface is not used. PDI, PDO and PCLK are high impedance inputs as long as PSEL is

not activated (active low).

PSEL has an internal pullup resistor and should be left open (tri-stated by the microcontroller) or set to a

high level during power down mode in order to prevent a trickle current flowing in the pullup.

5.4.2

Signal Interface

A bi-directional pin is usually used for data (DIO) to be transmitted and data received. DCLK providing the

data timing should be connected to a microcontroller input.

As an option, the data output in receive mode can be made available on a separate pin. See Section 5.6

further details.

5.4.3

PLL Lock Signal

Optionally, one microcontroller pin can be used to monitor the LOCK signal. This signal is at low logic

level when the PLL is in lock. It can also be used for carrier sense and to monitor other internal test

signals.

Figure 5-3. Microcontroller Interface

Detailed Description

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