COP688CL datasheet(16/40 Pages) NSC

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Timers (Continued)

TLDD9766 – 13

FIGURE 7 Timer in PWM Mode

The underflows can be programmed to toggle the TxA out-

put pin The underflows can also be programmed to gener-

ate interrupts

Underflows from the timer are alternately latched into two

pending flags TxPNDA and TxPNDB The user must reset

these pending flags under software control Two control en-

able flags TxENA and TxENB allow the interrupts from the

timer underflow to be enabled or disabled Setting the timer

enable flag TxENA will cause an interrupt when a timer un-

derflow causes the RxA register to be reloaded into the tim-

er Setting the timer enable flag TxENB will cause an inter-

rupt when a timer underflow causes the RxB register to be

reloaded into the timer Resetting the timer enable flags will

disable the associated interrupts

Either or both of the timer underflow interrupts may be en-

abled This gives the user the flexibility of interrupting once

per PWM period on either the rising or falling edge of the

PWM output Alternatively the user may choose to interrupt

on both edges of the PWM output

Mode 2 External Event Counter Mode

This mode is quite similar to the processor independent

PWM mode described above The main difference is that

the timer Tx is clocked by the input signal from the TxA pin

The Tx timer control bits TxC3 TxC2 and TxC1 allow the

timer to be clocked either on a positive or negative edge

from the TxA pin Underflows from the timer are latched into

the TxPNDA pending flag Setting the TxENA control flag

will cause an interrupt when the timer underflows

In this mode the input pin TxB can be used as an indepen-

dent positive edge sensitive interrupt input if the TxENB

control flag is set The occurrence of a positive edge on the

TxB input pin is latched into the TxPNDB flag

Figure 8 shows a block diagram of the timer in External

Event Counter mode

Note

The PWM output is not available in this mode since the TxA pin is

being used as the counter input clock

TLDD9766 – 14

FIGURE 8 Timer in External Event Counter Mode

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