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AD9684 датащи(PDF) 49 Page - Analog Devices

номер детали AD9684
подробное описание детали  Dual, 14-Bit, 1.25 GSPS, 1.2 V/2.5 V, Analog-to-Digital Converter
PDF  64 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9684 датащи(HTML) 49 Page - Analog Devices

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Product
Overview
Online
Documentation
Design
Resources
Discussion
Sample
& Buy
Data Sheet
AD9684
Rev. 0 | Page 49 of 64
SYNC± SETUP AND HOLD WINDOW MONITOR
To assist in ensuring a valid SYNC± capture, the AD9684 has a
SYNC± setup and hold window monitor. This feature allows the
system designer to determine the location of the SYNC± signals
relative to the CLK± signals by reading back the amount of setup
and hold margin on the interface through the memory map.
Figure 68 and Figure 69 show the setup and hold status values for
different phases of SYNC±.
The setup detector returns the status of the SYNC± signal before
the CLK± edge and the hold detector returns the status of the
SYNC± signal after the CLK± edge. Register 0x128 stores the
status of SYNC± and alerts the user if the SYNC± signal is
captured by the ADC.
VALID
REG 0x128[3:0]
CLK±
INPUT
SYNC±
INPUT
FLIP FLOP
HOLD (MIN)
FLIP FLOP
HOLD (MIN)
FLIP FLOP
SETUP (MIN)
–1
–2
–3
–4
–5
–6
–7
–8
7
6
5
4
3
2
1
0
Figure 68. SYNC Setup Detector
CLK±
INPUT
SYNC±
INPUT
VALID
REG 0x128[7:4]
FLIP FLOP
HOLD (MIN)
FLIP FLOP
HOLD (MIN)
FLIP FLOP
SETUP (MIN)
–1
–2
–3
–4
–5
–6
–7
–8
7
6
5
4
3
2
1
0
Figure 69. SYNC± Hold Detector



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