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AD9680

Data Sheet

Rev. C | Page 2 of 97

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 3

General Description ......................................................................... 4

Specifications..................................................................................... 5

DC Specifications ......................................................................... 5

AC Specifications.......................................................................... 6

Digital Specifications ................................................................... 8

Switching Specifications .............................................................. 9

Timing Specifications ................................................................ 10

Absolute Maximum Ratings.......................................................... 12

Thermal Characteristics ............................................................ 12

ESD Caution................................................................................ 12

Pin Configuration and Function Descriptions........................... 13

Typical Performance Characteristics ........................................... 15

AD9680-1250.............................................................................. 15

AD9680-1000.............................................................................. 19

AD9680-820 ................................................................................ 24

AD9680-500 ................................................................................ 29

Equivalent Circuits......................................................................... 33

Theory of Operation ...................................................................... 35

ADC Architecture ...................................................................... 35

Analog Input Considerations.................................................... 35

Voltage Reference ....................................................................... 41

Clock Input Considerations...................................................... 42

ADC Overrange and Fast Detect.................................................. 44

ADC Overrange.......................................................................... 44

Fast Threshold Detection (FD_A and FD_B) ........................ 44

Signal Monitor ................................................................................ 45

SPORT Over JESD204B............................................................. 46

Digital Downconverter (DDC)..................................................... 48

DDC I/Q Input Selection .......................................................... 48

DDC I/Q Output Selection ....................................................... 48

DDC General Description ........................................................ 48

Frequency Translation ................................................................... 54

Frequency Translation General Description.............................. 54

DDC NCO Plus Mixer Loss and SFDR................................... 55

Numerically Controlled Oscillator .......................................... 55

FIR Filters ........................................................................................ 57

FIR Filters General Description ............................................... 57

Half-Band Filters ........................................................................ 58

DDC Gain Stage ......................................................................... 60

DDC Complex to Real Conversion ......................................... 60

DDC Example Configurations ................................................. 61

Digital Outputs ............................................................................... 64

Introduction to the JESD204B Interface ................................. 64

JESD204B Overview .................................................................. 64

Functional Overview ................................................................. 65

JESD204B Link Establishment ................................................. 65

Physical Layer (Driver) Outputs .............................................. 67

JESD204B Tx Converter Mapping........................................... 69

Configuring the JESD204B Link.............................................. 71

Multichip Synchronization............................................................ 74

SYSREF± Setup/Hold Window Monitor................................. 76

Test Modes....................................................................................... 78

ADC Test Modes ........................................................................ 78

JESD204B Block Test Modes .................................................... 79

Serial Port Interface........................................................................ 81

Configuration Using the SPI..................................................... 81

Hardware Interface..................................................................... 81

SPI Accessible Features.............................................................. 81

Memory Map .................................................................................. 82

Reading the Memory Map Register Table............................... 82

Memory Map Register Table..................................................... 83

Applications Information .............................................................. 96

Power Supply Recommendations............................................. 96

Exposed Pad Thermal Heat Slug Recommendations............ 96

AVDD1_SR (Pin 57) and AGND (Pin 56 and Pin 60).............. 96

Outline Dimensions....................................................................... 97

Ordering Guide .......................................................................... 97

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