ADC0819 datasheet(4/12 Pages) NSC

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Electrical Characteristics The following specifications apply for VCC e 5V tretfe20 ns VREF e 5V unless

otherwise specified Boldface limits apply from TMIN to TMAX all other limits TAeTJe25 C

Typical

Tested

Design

Parameter

Conditions

(Note 6)

Limit

Units

(Note 7)

(Note 8)

AC CHARACTERISTICS

(Continued)

tCA Analog

After Address Is Latched

3SCLKa1 ms

sec

Sampling Time

CSeLow

tRDO Maximum DO

RLe30 kX

‘‘TRI-STATE’’ to ‘‘HIGH’’ State

150

Rise Time

CLe100 pf

‘‘LOW’’ to ‘‘HIGH’’ State

150

300

tFDO Maximum DO

RLe30 kX

‘‘TRI-STATE’’ to ‘‘LOW’’ State

150

Fall Time

CLe100 pf

‘‘HIGH’’ to ‘‘LOW’’ State

150

300

CIN Maximum Input

Analog Inputs ANO – AN10 and VREF

Capacitance

All Others

Note 1

Absolute Maximum Ratings indicate limits beyond which damage to the device may occur DC and AC electrical specifications do not apply when operating

the device beyond its specified operating conditions

Note 2

All voltages are measured with respect to ground

Note 3

Under over voltage conditions (VINk0V and VINlVCC) the maximum input current at any one pin is g5 mA If the voltage at more than one pin exceeds

VCC a 3V the total package current must be limited to 20 mA For example the maximum number of pins that can be over driven at the maximum current level of

5 mA is four

Note 4

Total unadjusted error includes offset full-scale linearity multiplexer and hold step errors

Note 5

Two on-chip diodes are tied to each analog input which will forward-conduct for analog input voltages one diode drop below ground or one diode drop

greater than VCC supply Be careful during testing at low VCC levels (45V) as high level analog inputs (5V) can cause this input diode to conduct especially at

elevated temperatures and cause errors for analog inputs near full-scale The spec allows 50 mV forward bias of either diode This means that as long as the

analog VIN does not exceed the supply voltage by more than 50 mV the output code will be correct To achieve an absolute 0 VDC to5VDC input voltage range will

therefore require a minimum supply voltage of 4950 VDC over temperature variations initial tolerance and loading

Note 6

Typicals are at 25 C and represent most likely parametric norm

Note 7

Tested Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level)

Note 8

Design Limits are guaranteed but not 100% production tested These limits are not used to calculate outgoing quality levels

Note 9

Channel leakage current is measured after the channel selection

Note 10

1 count e VREF 256

Note 11

Human body model 100 pF discharged through a 15 kX resistor

Test Circuits

Leakage Current

TLH9287 – 3

D0 Except ‘‘TRI-STATE’’

TLH9287 – 4

tTRI ‘‘TRI-STATE’’

TLH9287 – 5

Timing Diagrams

D0 ‘‘TRI-STATE’’ Rise

Fall Times

TLH9287 – 6

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