PI6C485352

2.5V/3.3V, 500 MHz Twelve 2-to-1 Differential LVPECL Clock Multiplexer

2

PI6C485352 Rev. A

01/24/13

Pin #

Pin Name

Type

Description

1, 2

3, 4

5, 6

7, 8

9, 10

11, 12

25, 26

27, 28

29, 30

31, 32

33, 34

35, 36

Q0, /Q0

Q1, /Q1

Q2, /Q2

Q3, /Q3

Q4, /Q4

Q5, /Q5

/Q11, Q11

/Q10, Q10

/Q9,Q9

/Q8,Q8

/Q7,Q7

/Q6,Q6

Output

Differential LVPECL Output pairs. LVPECL inter-

face levels

13, 24

37, 48

Power

Output supply pins

14, 23

Ground pins

15, 22

Core supply pins

16, 17

18, 19

20, 21

40, 41

42, 43

44, 45

SEL5, SEL4,

SEL3, SEL9,

SEL10, SEL11,

SEL8, SEL7,

SEL6, SEL0,

SEL1, SEL2

Pulldown

Clock select inputs. LVCMOS/LVTTL interface

levels

38

CLK1

Pulldown

Non-inverting differential clock input

39

/CLK1

Pullup/Pulldown

Inverting differential clock input

46

CLK0

Pulldown

Non-inverting differential clock input

47

/CLK0

Pullup/Pulldown

Inverting differential clock input

Pinout Table

13-0003