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PI6C485352 датащи(PDF) 1 Page - Pericom Semiconductor Corporation |
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PI6C485352 датащи(HTML) 1 Page - Pericom Semiconductor Corporation |
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1 / 7 page ![]() PI6C20800B Features Î Î Pin-to-pin compatible to ICS85352I Î Î FMAX ≤ 500 MHz Î Î Propagation Delay < 4ns Î Î Output-to-output skew < 100ps Î Î 12 pairs of differential LVPECL outputs Î Î Selectable differential CLK and /CLK inputs Î Î CLK, /CLK pair accepts LVDS, LVPECL, LVHSTL, SSTL and HCSL input level Î Î Select input accept CMOS/LVTTL levels Î Î 2.5V/3.3V power supply Î Î Operating Temperature: -40°C to +85°C Î Î Packaging (Pb-free & Green): ÎÎ — 48-pin TQFP (FA) PI6C485352 1 PI6C485352 Rev. A 01/24/13 Pin Configuration (48-Pin TQFP) Description The PI6C485352 is a high-performance low-skew LVPECL fanout buffer. PI6C485352 features two selectable differential inputs and translates to twelve LVPECL output pairs. The inputs can also be configured to single-ended with external resistor bias circuit. The CLK input accepts LVPECL, LVDS, LVHSTL, SSTL or HCSL signals. The PI6C485352 is ideal for differential to LVPECL translations and/or LVPECL clock distribution. Typical clock translation and distribution applications are data- communications and telecommunications. Applications Î Î Networking systems including switches and Routers Î Î High frequency backplane based computing and telecom platforms 2.5V/3.3V, 500 MHz Twelve 2-to-1 Differential LVPECL Clock Multiplexer 1 2 3 /Q1 4 Q2 5 Q1 6 Q3 7 /Q9 8 /Q2 Q6 Q7 /Q7 /Q8 /Q3 20 19 18 17 16 15 14 13 Q0 /Q0 Q10 9 Q4 12 10 /Q4 11 21 22 23 24 36 35 34 33 32 31 30 29 28 25 27 26 41 42 43 44 45 46 47 48 40 39 38 37 Q5 /Q5 /Q6 Q8 Q9 /Q10 /Q11 Q11 SEL [0:11] CLK0 /CLK0 CLK1 /CLK1 1 0 0 1 Q0 /Q0 Q11 /Q11 12 Block Diagram 13-0003 |
Аналогичный номер детали - PI6C485352 |
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Аналогичное описание - PI6C485352 |
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