ADuC7122BBCZ datasheet(39/96 Pages) AD

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Data Sheet

ADuC7122

Table 54. FEExSTA MMR Bit Designations

Bit

Description

15:6

Reserved.

Flash/EE interrupt status bit.

Set automatically when an interrupt occurs, that is, when a command is complete and the Flash/EE interrupt enable bit in the

FEExMOD register is set.

Cleared when reading the FEExSTA register.

Flash/EE controller busy.

Set automatically when the controller is busy.

Cleared automatically when the controller is not busy.

Command fail.

Set automatically when a command completes unsuccessfully.

Cleared automatically when reading the FEExSTA register.

Command complete.

Set by ADuC7122 when a command is complete.

Cleared automatically when reading the FEExSTA register.

Table 55. FEExMOD MMR Bit Designations

Bit

Description

7:5

Reserved. Always set these bits to 0 except when writing Flash memory control keys.

Flash/EE interrupt enable.

Set by the user to enable the Flash/EE interrupt. The interrupt occurs when a command is complete.

Cleared by user to disable the Flash/EE interrupt.

Erase/write command protection.

Set by the user to enable the erase and write commands.

Cleared to protect the Flash/EE memory against erase/write command.

Reserved. Should always be set to 0 by the user.

1:0

Flash/EE wait states. Both Flash/EE blocks must have the same wait state value for any change to take effect.

Table 56. Command Codes in FEExCON

Code

Command

Description

0x00

20F

Null

Idle state.

0x011

Single read

Load FEExDAT with the 16-bit data indexed by FEExADR.

0x021

Single write

Write FEExDAT at the address pointed by FEExADR. This operation takes 50 µs.

0x031

Erase/write

Erase the page indexed by FEExADR and write FEExDAT at the location pointed by FEExADR. This operation

takes 20 ms.

0x041

Single verify

Compare the contents of the location pointed by FEExADR to the data in FEExDAT. The result of the comparison

is returned in FEExSTA Bit 1.

0x051

Single erase

Erase the page indexed by FEExADR.

0x061

Mass erase

Erase user space. The 2 kB of kernel are protected in Block 0. This operation takes 2.48 sec. To prevent accidental

execution, a command sequence is required to execute this instruction.

0x07

Reserved

Reserved.

0x08

Reserved

Reserved.

0x09

Reserved

Reserved.

0x0A

Reserved

Reserved.

0x0B

Signature

Gives a signature of the 64 kB of Flash/EE in the 24-bit FEExSIGN MMR. This operation takes 32,778 clock cycles.

0x0C

Protect

This command can be run only once. The value of FEExPRO is saved and can be removed only with a mass erase

(0x06) or with the key.

0x0D

Reserved

Reserved.

0x0E

Reserved

Reserved.

0x0F

Ping

No operation, interrupt generated.

The FEExCON register always reads 0x07 immediately after execution of any of these commands.

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