| поискавой системы для электроныых деталей |
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SC2440AEVB датащи(PDF) 5 Page - Semtech Corporation |
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SC2440AEVB датащи(HTML) 5 Page - Semtech Corporation |
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5 / 28 page ![]() 5 Pin Descriptions Pin # Pin Name Pin Function , 8 BST, BST2 Supply pins to the power transistor drivers. Tie to external diode-capacitor bootstrap circuits to generate drive volt- ages higher than V IN in order to fully enhance the internal power switches. 2, 7 SW, SW2 Emitters of the internal power NPN transistors. Each SW pin is connected to the corresponding inductor, freewheel- ing diode and bootstrap capacitor. 3, 6 IN Power transistor collectors and the power supply to the internal control circuitry. Pins 3 and 6 are internally con- nected. These pins are to be tied to the same power supply and must be closely bypassed. 4 SYNC Driving the SYNC pin with a TTL-compatible clock synchronizes the SC2440A. If the SC2440A is to be synchronized to a channel frequency f SYNC, then program the channel free-running frequency to approximately fSYNC using the ROSC resistor. The applied clock frequency can be f SYNC or 2fSYNC. See Applications Information for details. Tie this pin to ground if not used. 5 ROSC An external resistor from this pin to ground sets the channel free-running frequency. 9, 6 FB2, FB Inverting inputs of the error amplifiers. Each FB pin is tied to a resistor divider between the corresponding output and ground. The resistor divider sets the channel output voltage. 0, 5 COMP2, COMP Outputs of the error amplifiers. The voltages at these pins control the peak switch currents. RC networks at these pins compensate the control loops. Pulling either pin below 0.8V stops the corresponding regulator. , 4 PGOOD2, PGOOD Open-collector outputs of power good comparators. Tie to external pull-up resistors from the input or the output of the converter. The PGOOD outputs become valid as soon as V IN rises above 0.9V during power-up. The PGOOD pin is actively pulled low until the corresponding FB pin rises to within 0% of the final regulation voltage. 2, 3 SS2, SS A capacitor from either SS pin to ground sets the soft-start interval and provides an overload hiccup function for that channel. Pulling either SS pin below 0.8V with an open-collector or an open-drain transistor shuts off the cor- responding regulator. To completely shut off the SC2440A to low current state, pull both SS pins below 0.5V. 7 (Exposed Pad) GND The exposed pad at the bottom of the package is the analog ground of the SC2440A. It also serves as a thermal contact to the circuit board. It is to be connected to the ground plane of the PC board using multiple vias. SC2440A |
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