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MSP430F6433IPZ датащи(PDF) 57 Page - Texas Instruments |
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MSP430F6433IPZ датащи(HTML) 57 Page - Texas Instruments |
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57 / 119 page ![]() MSP430F6438, MSP430F6436, MSP430F6435, MSP430F6433 www.ti.com SLAS720D – AUGUST 2010 – REVISED DECEMBER 2015 6.4 Operating Modes These devices have one active mode and seven software-selectable low-power modes of operation. An interrupt event can wake up the device from any of the low-power modes, service the request, and restore back to the low-power mode on return from the interrupt program. Software can configure the following operating modes: • Active mode (AM) – All clocks are active • Low-power mode 0 (LPM0) – CPU is disabled – ACLK and SMCLK remain active, MCLK is disabled – FLL loop control remains active • Low-power mode 1 (LPM1) – CPU is disabled – FLL loop control is disabled – ACLK and SMCLK remain active, MCLK is disabled • Low-power mode 2 (LPM2) – CPU is disabled – MCLK, FLL loop control, and DCOCLK are disabled – DC generator of the DCO remains enabled – ACLK remains active • Low-power mode 3 (LPM3) – CPU is disabled – MCLK, FLL loop control, and DCOCLK are disabled – DC generator of the DCO is disabled – ACLK remains active • Low-power mode 4 (LPM4) – CPU is disabled – ACLK is disabled – MCLK, FLL loop control, and DCOCLK are disabled – DC generator of the DCO is disabled – Crystal oscillator is stopped – Complete data retention • Low-power mode 3.5 (LPM3.5) – Internal regulator disabled – No data retention – RTC enabled and clocked by low-frequency oscillator – Wake-up signal from RST/NMI, RTC_B, P1, P2, P3, and P4 • Low-power mode 4.5 (LPM4.5) – Internal regulator disabled – No data retention – Wake-up signal from RST/NMI, P1, P2, P3, and P4 Copyright © 2010–2015, Texas Instruments Incorporated Detailed Description 57 Submit Documentation Feedback Product Folder Links: MSP430F6438 MSP430F6436 MSP430F6435 MSP430F6433 |
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