ISO7240CFDW datasheet(11/46 Pages) TI1

11 / 46 page

ISO7240CF, ISO7240C, ISO7240M

ISO7241C, ISO7241M, ISO7242C, ISO7242M

www.ti.com

SLLS868R – SEPTEMBER 2007 – REVISED SEPTEMBER 2015

7.6 Electrical Characteristics: VCC1 at 5-V, VCC2 at 3.3-V

(1) Operation

over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY CURRENT

Quiescent

VI = VCC or 0 V

All channels, no load, EN

ISO7240C/M

at 3 V

25 Mbps

12.5 MHz Input Clock Signal

10.5

Quiescent

VI = VCC or 0 V

All channels, no load,

6.5

ISO7241C/M

EN1 at 3 V,

ICC1

25 Mbps

12.5 MHz Input Clock Signal

EN2 at 3 V

Quiescent

VI = VCC or 0 V

All channels, no load,

ISO7242C/M

EN1 at 3 V,

25 Mbps

12.5 MHz Input Clock Signal

EN2 at 3 V

Quiescent

VI = VCC or 0 V

9.5

All channels, no load, EN

ISO7240C/M

at 3 V

25 Mbps

12.5 MHz Input Clock Signal

10.5

Quiescent

VI = VCC or 0 V

All channels, no load,

ISO7241C/M

EN1 at 3 V,

ICC2

11.5

25 Mbps

12.5 MHz Input Clock Signal

EN2 at 3 V

Quiescent

VI = VCC or 0 V

All channels, no load,

ISO7242C/M

EN1 at 3 V,

25 Mbps

12.5 MHz Input Clock Signal

EN2 at 3 V

ELECTRICAL CHARACTERISTICS

IOFF

Sleep mode output current

EN at 0 V, Single channel

μA

3.3-V side

VCCO – 0.4

IOH = –4 mA, See Figure 9

VOH

High-level output voltage

5-V side

VCCO – 0.8

IOH = –20 μA, See Figure 9

VCCO – 0.1

IOL = 4 mA, See Figure 9

0.4

VOL

Low-level output voltage

IOL = 20 μA, See Figure 9

0.1

VI(HYS)

Input voltage hysteresis

150

IIH

High-level input current

IN at VCCI

μA

IIL

Low-level input current

IN at 0 V

–10

Input capacitance to ground

IN at VCC, VI = 0.4 sin (4E6πt)

CMTI

Common-mode transient immunity

VI = VCC or 0 V, See Figure 13

kV/

μs

(1)

For the 5-V operation, VCC1 or VCC2 is specified from 4.5 V to 5.5 V.

For the 3.3-V operation, VCC1 or VCC2 is specified from 3.15 V to 3.6 V.

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