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STM32L162VD датащи(PDF) 87 Page - STMicroelectronics |
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STM32L162VD датащи(HTML) 87 Page - STMicroelectronics |
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87 / 115 page ![]() DocID027268 Rev 3 87/115 STM32L162VD-X Electrical characteristics 107 Figure 15. Recommended NRST pin protection 1. The reset network protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 44. Otherwise the reset will not be taken into account by the device. 6.3.15 TIM timer characteristics The parameters given in the Table 45 are guaranteed by design. Refer to Section 6.3.13: I/O port characteristics for details on the input/output ction characteristics (output compare, input capture, external clock, PWM output). Table 45. TIMx(1) characteristics 1. TIMx is used as a general term to refer to the TIM2, TIM3 and TIM4 timers. Symbol Parameter Conditions Min Max Unit tres(TIM) Timer resolution time -1 - tTIMxCLK fTIMxCLK = 32 MHz 31.25 - ns fEXT Timer external clock frequency on CH1 to CH4 -0 fTIMxCLK/2 MHz fTIMxCLK = 32 MHz 0 16 MHz ResTIM Timer resolution - 16 bit tCOUNTER 16-bit counter clock period when internal clock is selected (timer’s prescaler disabled) - 1 65536 tTIMxCLK fTIMxCLK = 32 MHz 0.0312 2048 µs tMAX_COUNT Maximum possible count - - 65536 × 65536 tTIMxCLK fTIMxCLK = 32 MHz - 134.2 s |
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