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M24C02-A125

DC and AC parameters

38

Table 12. 1 MHz AC characteristics

Symbol

Alt.

Parameter

Min.

Max.

Unit

Clock frequency

0

1

MHz

Clock pulse width high

260

-

ns

Clock pulse width low

500

-

ns

Input signal rise time

(1)

1. There is no min. or max. values for the input signal rise and fall times. However, it is recommended by the

I²C specification that the input signal rise and fall times be more than 20 ns and less than 120 ns when

(1)

ns

Input signal fall time

(1)

(1)

ns

2. Characterized only, not tested in production.

SDA (out) fall time

20

120

ns

50

-

ns

0

-

ns

3. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or

rising edge of SDA.

Data out hold time

100

-

ns

assuming that the Rbus × Cbus time constant is within the values specified in Figure 11.

Clock low to next data valid (access time)

-

450

ns

250

-

ns

250

-

ns

250

-

ns

Time between Stop condition and next Start

condition

500

-

ns

5. WC=0 set up time condition to enable the execution of a WRITE command.

0

-

µs

6. WC=0 hold time condition to enable the execution of a WRITE command.

1

-

µs

Write time

-

4

ms

-

Pulse width ignored (input filter on SCL and

SDA)

-80

ns