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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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L5963 датащи(PDF) 19 Page - STMicroelectronics |
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L5963 датащи(HTML) 19 Page - STMicroelectronics |
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19 / 45 page  DocID028553 Rev 1 19/45 L5963 Functional Description 44 6.2.6 Power ground (PGND1 and PGND2) PGND1 pin and PGND2 pin are power ground references for the DC/DC1 and DC/DC2 respectively. All switching nodes are referred to these two pins. 6.2.7 Signal ground (SGND) This pin is the ground reference for standby regulator, HSD and internal bias. 6.2.8 PWM signal ground (SWGND) This pin is the ground reference for signal part of DC/DC1 and DC/DC2. 6.2.9 TAB TAB is connected to the device substrate. This pin must be connected to GND to guarantee the substrate is always at the lowest potential to avoid parasitic activation. 6.2.10 Linear regulator Figure 9. Linear regulator diagram The linear regulator has two operative modes: standby mode and non-standby mode. Its output voltage is set by an external resistor divider through the feedback pin FBLDO. As a standby regulator, the current capability is reduced to 50 mA and the quiescent current minimized. In this case, the external resistor divider should be in the Mega ohm order to reduce total quiescent current. As a non standby regulator, it has higher load capability (up to 250 mA). |
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