USB3503 datasheet(56/73 Pages) MICROCHIP

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USB3503

DS00001584B-page 56

 2011-2015 Microchip Technology Inc.

10.8

Regulator Output Voltages and Capacitor Requirement

10.9

ESD and Latch-Up Performance

10.10 ESD Performance

The USB3503 is protected from ESD strikes. By eliminating the requirement for external ESD protection devices, board

space is conserved, and the board manufacturer is enabled to reduce cost. The advanced ESD structures integrated

into the USB3503 protect the device whether or not it is powered up.

10.10.1

HUMAN BODY MODEL (HBM) PERFORMANCE

HBM testing verifies the ability to withstand the ESD strikes like those that occur during handling and manufacturing,

and is done without power applied to the IC. To pass the test, the device must have no change in operation or perfor-

mance due to the event. All pins on the USB3503 provide ±5 kV HBM protection, as shown in Table 10-10.

10.10.2

EN 61000-4-2 PERFORMANCE

The EN 61000-4-2 ESD specification is an international standard that addresses system-level immunity to ESD strikes

while the end equipment is operational. In contrast, the HBM ESD tests are performed at the device level with the device

powered down.

Microchip contracts with Independent laboratories to test the USB3503 to EN 61000-4-2 in a working system. Reports

are available upon request. Please contact your representative, and request information on 3rd party ESD test results.

The reports show that systems designed with the USB3503 can safely provide the ESD performance without additional

board level protection.

High Speed Mode Timing

Receiver Waveform

Requirements

Eye pattern of Template 4

in USB 2.0 specification

Data Source Jitter and

Receiver Jitter Tolerance

Eye pattern of Template 4

in USB 2.0 specification

TABLE 10-9:

REGULATOR OUTPUT VOLTAGES AND CAPACITOR REQUIREMENT

Parameter

Symbol

Conditions

MIN

TYP

MAX

Units

Regulator Output Voltage

VDD33

5.5V > VBAT > 2.9V

2.8

3.3

3.6

Regulator Capacitor

CBYP33

4.7

μF

Capacitor ESR

CESR33

Ω

Regulator Output Voltage

VDD12

3.6V > VDD33 > 2.8V

1.1

1.2

1.3

Regulator Capacitor

CBYP12

1.0

μF

Capacitor ESR

CESR12

Ω

TABLE 10-10: ESD AND LATCH-UP PERFORMANCE

Parameter

Conditions

MIN

TYP

MAX

Units

Comments

ESD PERFORMANCE

Human Body Model

±5

Device

System

EN/IEC 61000-4-2 Contact

Discharge

±15

3rd party system test

System

EN/IEC 61000-4-2 Air-gap

Discharge

±15

3rd party system test

LATCH-UP PERFORMANCE

All Pins

EIA/JESD 78, Class II

150

TABLE 10-8:

DYNAMIC CHARACTERISTICS: ANALOG I/O PINS (DP/DM) (CONTINUED)

Parameter

Symbol

Conditions

MIN

TYP

MAX

Units

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