USB3503 datasheet(50/73 Pages) MICROCHIP

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USB3503

DS00001584B-page 50

 2011-2015 Microchip Technology Inc.

9.0

INTEGRATED POWER REGULATORS

9.1

Overview

The integrated power regulators are designed to provide significant flexibility to the system in providing power to the

USB3503. Several different configurations are allowed in order to align the USB3503 power structure to the supplies

available in the system.

9.1.1

3.3V REGULATOR

The USB3503 has an integrated regulator to convert from VBAT to 3.3V.

9.1.2

1.2V REGULATOR

The USB3503 has an integrated regulator to convert from a variable voltage input on VDD_CORE_REG to 1.2V. The

1.2V regulator shall be tolerant to the presence of low voltage (~0V) on the VDD_CORE_REG pin in order to support

system power solutions where a 1.8V supply is not always present in low power states.

The 1.2V regulator shall support an input voltage range consistent with a 1.8V input in order to reduce power consump-

tion in systems which provide multiple power supply levels. In addition the 1.2V regulator shall support an input voltage

up to 3.3V for systems which provide only a single power supply. The device will support operation where the 3.3V reg-

ulator output can drive the 1.2V regulator input such that VBAT is the only required supply.

9.2

Power Configurations

The USB3503 support operation with no back current when power is connected in each of the following configurations.

9.2.1

SINGLE SUPPLY CONFIGURATIONS

9.2.1.1

VBAT Only

bit VBAT should be tied to the VBAT system supply. VDD33_BYP regulator output and VDD_CORE_REG should be

tied together on the board. In this configuration the 3.3V regulator will be active, and the 3.3V to 1.2V regulator will be

active.

9.2.1.2

3.3V Only

VBAT should be tied to the 3.3V system supply. VDD33_BYP and VDD_CORE_REG pins should be tied together on

the board. In this configuration, the 3.3V regulator will operate in dropout. The 1.2V regulator will be active.

9.2.2

DOUBLE SUPPLY CONFIGURATIONS

9.2.2.1

VBAT + 1.8V

VBAT should be tied to the VBAT system supply. VDD33_BYP regulator output requires external

capacitor.

VDD_CORE_REG should be tied to the 1.8V system supply. In this configuration, the 3.3V regulator and the 1.2V reg-

ulator will be active.

9.2.2.2

3.3V + 1.8V

VBAT should be tied to the 3.3V system supply. VDD33_BYP should be connected to the 3.3V external capacitor.

VDD_CORE_REG should be tied to the 1.8v system supply. In this configuration the 3.3V regulator will operate in drop-

out. The 1.2V regulator will be active.

9.3

Regulator Control Signals

The regulators are controlled by RESET_N. When RESET_N is brought high the VDD33 regulator will turn on. When

RESET_N is brought low the VDD33 regulator will turn off.

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