TAS5760LDAPR datasheet(47/77 Pages) TI1

47 / 77 page

TAS5760L

www.ti.com

SLOS782B – JULY 2013 – REVISED SEPTEMBER 2015

NOTE

Control port register changes should only occur when the device is placed into shutdown.

This can be accomplished either by pulling the SPK_SD pin LOW or clearing the SPK_SD

bit in the control port.

10.2.3.2.2

Shutdown Procedures- Software Control Mode

1. The device is in normal operation

2. Mute via the control port

3. Pull SPK_SD LOW

4. The clocks can now be stopped and the power supplies brought down

5. The device is now fully shutdown and powered off

NOTE

Any control port register changes excluding volume control changes should only occur

when the device is placed into shutdown. This can be accomplished either by pulling the

SPK_SD pin LOW or clearing the SPK_SD bit in the control port.

10.2.3.2.3

Component Selection and Hardware Connections

above details the typical connections required for proper operation of the device. It is with this list of components

that the device was simulated, tested, and characterized. Deviation from this typical application circuit unless

recommended by this document may produce unwanted results, which could range from degradation of audio

performance to destructive failure of the device.

10.2.3.2.3.1

I²C Pull-Up Resistors

It is important to note that when the device is operated in Software Control Mode, the customary pull-up resistors

are required on the SCL and SDA signal lines. They are not shown in the Typical Application Circuits, since they

are shared by all of the devices on the I²C bus and are considered to be part of the associated passive

components for the System Processor. These resistor values should be chosen per the guidance provided in the

I²C Specification.

10.2.3.2.3.2

Digital I/O Connectivity

The digital I/O lines of the TAS5760L are described in previous sections. As discussed, whenever a static digital

pin (that is a pin that is hardwired to be HIGH or LOW) is required to be pulled HIGH, it should be connected to

DVDD through a pullup resistor in order to control the slew rate of the voltage presented to the digital I/O pins. It

is not, however, necessary to have a separate pullup resistor for each static digital I/O line. Instead, a single

resistor can be used to tie all static I/O lines HIGH to reduce BOM count. For instance, if Software Control Mode

is desired both the GAIN[1:0] and the PBTL/SCL pins can both be pulled HIGH through a single pullup resistor.

10.2.3.3 Application Curve

Table 14. Relevant Performance Plots

PLOT TITLE

PLOT NUMBER

Figure 27. THD+N vs Frequency With PVDD = 12 V, POSPK = 1 W

G032

Figure 29. THD+N vs Output Power With PVDD = 12 V With 1 kHz Sine Input

G035

Figure 37. Efficiency vs Output Power

G038

Figure 2. THD+N vs Frequency With PVDD = 12 V, POSPK = 1 W

G004

Figure 35. THD+N vs Output Power With PVDD = 12 V

G011

Figure 7. Efficiency vs Output Power

G015

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