AS3955 datasheet(14/111 Pages) AMSCO

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[v1-01] 2015-Apr-29

AS3955 − Detailed Description

VP_IO is connected to VDD only when AS3955 is not in the RF

field (rectified supply voltage is below HF_PON threshold) and

the SPI / I²C interface is activated by pulling /SS signal low. The

switch to VP_IO is controlled by /SS signal. The deactivation is

delayed by 0.7ms minimum, so that the switch shall stay closed

in case of shorter times between successive SPI / I²C activations.

The switch is also closed during EEPROM writes activated over

SPI / I²C.

At activation of the switch, the time between the falling edge

of the /SS signal and rising edge of SCLK shall be at least 300μs

to allow charging of internal VDD buffer capacitor, expiration

of POR signal and to perform a complete IC initialization. Please

note that the only SPI / I²C operations, which are allowed in this

mode, are read and write of EEPROM and registers.

If the RF filed is lost during operation and the external system

(MCU) is supplied over battery and /SS is low then power

manager will automatically connect the VDD to VP_IO.

To enable low power mode where tag consumes less than 1uA

at room temperature following conditions must be met:

• SPI interface configured

• All SPI interface input lines (including /SS) must be set to

high

• All SPI output lines must be open

Figure 14:

Power Manager Concept

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