AS3415 datasheet(55/102 Pages) AMSCO

55 / 102 page

ams Datasheet, Confidential: 2014-Jun-13 [v1-30]

AS3415/AS3435 – 55

Detaile d Desc rip t ion

Timing is important, to avoid latch-up, when using an external

buffer and switching on the ANC device. The timing diagram in

Figure 70 shows that it is important that there is a certain delay

requirement between VBAT and the MODE /CSCL pin. This delay

is mandatory in order to guarantee that the device starts up

properly. The MODE /CSCL pin powers up the ANC device. The

whole sequence to power up the internal charge pump of the

AS3415/35 takes approximately 1ms. Once VNEG is settled the

external VNEG buffer (e.g. power supply) can be enabled in order

to support the charge pump especially during the trim process

which can now be started.

Figure 70:

Timing Diagram VNEG Buffering

VNEG Buffer Timing: This timing diagram shows how to buffer the VNEG supply during the OTP programming

process.

To guarantee a successful trimming process it is important to

follow the predefined trimming sequence shown in Figure 71

exactly. As a first step it is important to do a register dump of

all OTP registers. This register backup in your system memory

is a backup of all register settings and is necessary for

verification after the trim process to make sure that all bits are

trimmed correctly. Once the register dump has been done it is

important to check registers 0x30 and 0x31. These registers

typically indicate if the device is already trimmed or not. If both

registers have the value 0x80 you can enter the trim mode and

start the trimming process. Once trimming is done, the most

important step is comparing the values trimmed to the device

AS3415 датащи(PDF) 55 Page - ams AG