AS3415 datasheet(81/102 Pages) AMSCO

81 / 102 page

ams Datasheet, Confidential: 2014-Jun-13 [v1-30]

AS3415/AS3435 – 81

Reg i st er Description

Figure 102:

CONFIG_1 Register Description

Figure 103:

CONFIG_2 Register Description

Name

Address

Default Value

CONFIG_1

0x3E

0x00

This bit controls the OTP programming clock source.

Bit

Bit Name

Default

Access

Bit Description

3EXTBURNCL

R/W

This register controls the clock source for OTP

programming. Typically the internal clock is being

used for OTP programming.

0: External burn clock disabled

1: External burn clock enabled

Name

Address

Default Value

CONFIG_2

0x3F

0x00

This register controls the register access to all OTP registers. In order to get access to these registers it is

necessary to set EVAL_REG_ON bit to ‘1’.

Bit

Bit Name

Default

Access

Bit Description

5TM34

R/W

This Register defines the register bank selection for

TM34 you can select either between Register bank

0x10-0x17 or 0x30h-0x34.

0: Test mode Registers 14h-17h and 10h-13h

disabled test mode Registers 30h-33h and 34h-

37h enabled

1: Test mode Registers 14h-17h and 10h-13h enabled

test mode Registers 30h-33h and 34h-37h disabled

4BURNSW

R/W

This register controls the internal buffer switch from

line input to VNEG for VNEG buffering during OTP

programming.

0: BURN switch disabled

1: BURN switch enabled

3TM_REG34-35

R/W

0: Register 34h-35h disabled

1: Register 34h-35h enabled

2TM_REG30-33

R/W

0: Register 30h-33h disabled

1: Register 30h-33h enabled

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