
PRELIMINARY
FTG for Intel® Pentium® 4 CPU and Chipsets
CY28324
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
Document #: 38-07002 Rev. *A
Revised November 14, 2001
Features
• Compatible to Intel® CK-00, CK-Titan & CK-408 Clock
Synthesizer/Driver Specifications
• System frequency synthesizer for Intel 850, Brookdale
(845) and Brookdale - G Pentium® 4 Chipsets
• Programmable clock output frequency with less than 1
MHz increment
• Integrated fail-safe Watchdog Timer for system
recovery
• Automatically switch to HW selected or SW
programmed clock frequency when Watchdog Timer
time-out
• Capable of generating system RESET after a Watchdog
Timer time-out occurs or a change in output frequency
via SMBus interface
• Support SMBus byte read/write and block read/write
operations to simplify system BIOS development
• Vendor ID and Revision ID support
• Programmable drive strength support
• Programmable output skew support
• Power management control inputs
• Available in 48-pin SSOP
CPU
3V66
PCI
REF
48M
24_48M
x 2
x 4
x 10
x 2
x 1
x 1
Intel and Pentium are registered trademarks of Intel Corporation.
Block Diagram
Pin Configuration
VDD_REF
CPU0:1, CPU0:1#
XTAL
PLL Ref Freq
X2
X1
VDD_PCI
OSC
SCLK
PLL 1
SMBus
Logic
VDD_48MHz
SDATA
VDD_3V66
Divider
Network
VDD_CPU
Stop
Clock
Control
Stop
Clock
Control
PLL2
*FS0:4
2
*CPU_STP#
PWR_DWN#
*PCI_STP#
SSOP-48
REF0:1
VTT_PWRGD#
*MULTSEL1/REF1
VDD_REF
X1
X2
GND_PCI
*FS2/PCI_F0
*FS3/PCI_F1
*MODE/PCI_F2
VDD_PCI
*FS4/PCI0
PCI1
PCI2
GND_PCI
PCI3
PCI4
PCI5
PCI6
VDD_PCI
VTT_PWRGD#
RST#
GND_48MHz
*FS0/48MHz
*FS1/24_48MHz
VDD_48MHz
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
28
27
26
25
32
31
30
29
REF0/MULTSEL0*
GND_REF
VDD_MREF
3VMREF/CPU_STP#*
3VMREF#/PCI_STP#*
GND_MREF
PWR_DWN#
CPU0
CPU0#
VDD_CPU
CPU1
CPU1#
GND_CPU
IREF
VDD_CORE
GND_CORE
VDD_3V66
3V66_0
3V66_1
GND_3V66
3V66_2
3V66_3
SCLK
SDATA
*MULTSEL0:1
3V66_0:3
PCI_F0:2
PCI0:6
48MHz
24_48MHz
RST#
VDD_MREF
3VMREF, 3VMREF#
Note:
1.
Signals marked with ‘*’ have internal pull-up resistor.