Z86L7208FSC datasheet(30/71 Pages) ZILOG

30 / 71 page

Z86C72/C92/L72/L92

IR Microcontroller

Zilog

6-30

P R E L I M I N A R Y

DS97LVO0900

FUNCTIONAL DESCRIPTION

The Z8® incorporates special functions to enhance func-

tionality in consumer and battery operated applications.

Reset. The device is reset in one of the following condi-

tions:

Power-On Reset

Watch-Dog Timer

Stop-Mode Recovery Source

Low Voltage Detection

External Reset

Program Memory. The Z86L/C72 addresses up to 16K of

internal program memory, with the remainder being exter-

nal memory (Figure 17). The first 12 bytes of program

memory are reserved for the interrupt vectors. These loca-

tions contain five 16-bit vectors that correspond to the five

available interrupts. At addresses 16K and greater, the

Z86L/C72 executes external program memory fetches (re-

fer to external memory timing specifications).

The Z86L72/C92 addresses up to (64K - 512 KB) of exter-

nal program memory beginning at address 0. This is also

true of the Z86L/C72 when the R//RL input is forced to a

low.

RAM. The Z86L72 has a 768-byte RAM. 256 bytes make

up the Register file. The remaining 512 bytes make up the

Extended Data RAM.

Extended Data RAM. The Extended Data RAM occupies

the address range FE00H-FFFFH (512 bytes). This range

of external addresses is replaced by the internal Extended

Data RAM and cannot be used to directly write to or read

from External Memory. Accessing the Extended Data

RAM is accomplished by using LDE, LDEI, LDC, or LDCI

instructions. Port 1 and Port 0 are free to be set as I/O or

ADDR/DATA modes (except for high-impedance) when

accessing Extended Data RAM. In addition, if the External

Memory uses the same address range as the Extended

Data RAM, it can be used as the External Stack only.

Note: The Extended Data RAM cannot be used as STACK

or instruction/code memory. Accessing the Extended Data

RAM has the following condition: P01M register bits D4-D3

cannot be set to 11.

Figure 17. L72/C72 Program Memory Map

External ROM

Location of

First Byte of

Instruction

Executed

After RESET

Interrupt

Vector

(Lower Byte)

Interrupt

Vector

(Upper Byte)

Reserved

IRQ4

IRQ3

IRQ2

IRQ1

IRQ0

Reserved

On-Chip

ROM

16384

Reset Start Address

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