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TMP006B датащи(PDF) 16 Page - Texas Instruments |
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TMP006B датащи(HTML) 16 Page - Texas Instruments |
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16 / 38 page ![]() TMP006, TMP006B SBOS518E – MAY 2011 – REVISED APRIL 2015 www.ti.com The TMP006 and TMP006B operate only as a slave device on the two-wire bus. Connections to either bus are made via the open-drain I/O lines, SDA, and SCL. The SDA and SCL pins feature integrated spike-suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. The TMP006 and TMP006B support the transmission protocol for fast (1 kHz to 400 kHz) and high-speed (1 kHz to 3.4 MHz) modes. All data bytes are transmitted MSB first. 8.3.8.1 Serial Bus Address To communicate with the TMP006 or TMP006B, the master must first address slave devices via a slave address byte. The slave address byte consists of seven address bits and a direction bit that indicates the intent to execute a read or write operation. The TMP006 and TMP006B feature two address pins to allow up to eight devices to be addressed on a single bus. Table 4 describes the pin logic levels used to properly connect up to eight devices. The state of the ADR0 and ADR1 pins is sampled on every bus communication and should be set before any activity on the interface occurs. Table 4. TMP006 and TMP006B Address Pins and Slave Addresses ADR1 ADR0 SMBus Address 0 0 1000000 0 1 1000001 0 SDA 1000010 0 SCL 1000011 1 0 1000100 1 1 1000101 1 SDA 1000110 1 SCL 1000111 8.3.8.2 Read and Write Operations Access a particular register on the TMP006 and TMP006B by writing the appropriate value to the pointer register. The pointer value is the first byte transferred after the slave address byte with the R/W bit low. Every write operation to the TMP006 and TMP006B requires a value for the pointer (see Figure 12). When reading from the TMP006 or TMP006B, the last value stored in the pointer by a write operation is used to determine which register is read by a read operation. To change the register pointer for a read operation, a new value must be written to the pointer. This transaction is accomplished by issuing a slave address byte with the R/W bit low, followed by the pointer byte. No additional data are required. The master can then generate a START condition and send the slave address byte with the R/W bit high to initiate the read command. If repeated reads from the same register are desired, it is not necessary to continually send the pointer bytes because the TMP006 and TMP006B retain the pointer value until it is changed by the next write operation. Note that register bytes are sent MSB first, followed by the LSB. 16 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated Product Folder Links: TMP006 TMP006B |
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