VP5313/VP5513

4

Pin Name

Pin No.

Description

PD0-7

2-4,

8 Bit Pixel Data inputs clocked by PXCK. PD0 is the least significant bit. These pins are

internally pulled low.

PXCK

44

27MHz Pixel Clock input. The VP5313/VP5513 internally divides PXCK by two to provide the

pixel clock.

SA

18

Slave address select.

SCL

23

SDA

24

FC0-2

12-14

Field Counter output in master sync mode.

REFSQ

9

Reference square wave input used only during Genlock mode.

SCSYNC

8

Subcarrier sync input, (synchronises phase quadrant in 4xfsc genlock mode), see fig 6.

PALID

7

PAL IDENT input, controls swinging colour burst phase in PAL genlock mode.

COMPSYNC

6

Composite sync pulse output. This is an active low output signal.

CLAMP

5

The CLAMP output signal is synchronised to COMPSYNC output and indicates the position of

the BURST pulse, (lines 10-263 and 273-525 for NTSC; lines 6-310 and 319-623 for PAL-

B,D,G,I,N(Argentina)).

TTXREQ

17

Teletext Data Request output, requests next line of teletext data.

TTXDATA

19

Teletext Data input.

HSYNC

15

Horizontal Sync, output in master mode, input in slave mode

VSYNC

16

Vertical Sync, output in master mode, input in slave mode

RESET

22

Master reset. This is an asynchronous, active low, input signal and must be asserted for a

minimum 200ns in order to reset the VP5313/VP5513.

VREF

33

Voltage reference output. This output is nominally 1·0V and should be decoupled with a

100nF capacitor to GND.

RREF

34

DAC full scale current control. A resistor connected between this pin and GND sets the

magnitude of the video output current. An internal loop amplifier controls a reference current

flowing through this resistor so that the voltage across it is equal to the Vref voltage. This

reference current has a weighting equal to 20.8 LSB’s.

DACCOMP

25

DAC compensation. A 100nF ceramic capacitor must be connected to AVDD.

CVBS1

32

Composite video output. These are high impedance current source outputs. A DC path to

GND must exist from each of these pins.

BLUE/CVBS2

31

Blue or composite DAC output. Output type as CVBS1.

GREEN/Y

27

Green or luminance DAC output. Output type as CVBS1.

RED/C

26

Red or chrominance DAC output. Output type as CVBS1.

VDD

1, 11, 20

Positive supply input. All VDD pins must be connected.

AVDD

37,28,30

Analog positive supply input. All AVDD pins must be connected.

GND

10,21,43

Negative supply input. All GND pins must be connected.

AGND

36,29,35

Analog negative supply input. All AGND pins must be connected.

PIN DESCRIPTIONS

38-42