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0AMA датащи(PDF) 17 Page - Mitel Networks Corporation |
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0AMA датащи(HTML) 17 Page - Mitel Networks Corporation |
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17 / 23 page ![]() PDSP16510A MA 17 than 1024 points are to be performed simultaneously. It changes the LFLG logic and allows sampling rates up to the system clock rate to be achieved with multiple output proces- sors. BIT 11 When this bit is set the PDSP16510 will not generate DAV until 24 DOS clocks after data was actually valid. In this case the output tri-state drivers will be enabled at the correct time, even though the DAV signal was not externally valid. Host controlled dumping should not be used. BIT 12 When this bit is set in the single device mode, the INEN input is a simple load enable signal. When it is reset an INEN edge is needed at the end of a load sequence before a new one can commence. When it is reset in a multiple device mode it has no action, but when it is set it will cause the DEF high going edge to also initiate a load operation. BIT 14:13 These bits allow four dump size options to be provided. Individual frequency bins are not accessible. BIT 15 Under normal circumstances DAV would be expected to go invalid when a transform has been dumped. In some applications, however, it may be necessary to read the outputs more than once. When this bit is set, DAV will remain valid until the next INEN input, and will indicate that the transformed data still remains in the internal buffer. As soon as the next INEN is received the transformed data will be overwritten. Whilst DAV remains active the output tri-states will be enabled. WINDOW OPERATORS Since only a finite segment of a signal can be observed and processed at any one time, it is impossible to obtain pure spectral lines. Discontinuities are introduced at the bounda- ries of the observation interval which lead to spectral leakage. Windows are weighting functions applied to the data in order to reduce these discontinuities at the boundaries. In the time domain the signal has to be observed through a finite window as a matter of accord. This is in fact equivalent to multiplying the signal with a set of uniform weights i.e. a rectangular window operator. In the frequency domain the spectrum of the data will be the spectrum of this weighting function shifted to the sinusoidal frequencies of the compo- nents in the data. The rectangular window has a Fourier Transform which is a SINC(X) function. This has sidelobes which are only 13dB down from the main lobe. This severely limits the dynamic range of the system since a second sinusoid in close proximity would have its main lobe swamped by this side lobe. This would occur if its amplitude was a mere 13dB down from the first sinusoid. Window operators are thus mathematically constructed to cancel these sidelobes as far as possible. Unfortunately this is normally done at the expense of making the main lobe spread over more frequency bins. This reduces the ability of the system to resolve two frequencies, and can only be inputs. When data is from a single source, and no overlaps are needed, only the real input should be used. If 50% or 75% overlaps are needed from a single source of real data, the device always expects blocks to be simultaneously loaded. An external FIFO is then needed to supply data to the real inputs after a delay of one block. Each block is thus loaded twice, firstly through the Auxiliary inputs and then through the Real inputs. BIT 10:9 These bits define a single device system, or one of three multiple device possibilities. The choice between the first and second multiple device mode is dependent on the transform size and the sampling rate needed. The third mode should only be used when overlapped multiple transforms with less Table 6. Mode Control Bit Allocations BITS Dec' OPTION 2:0 000 16 x 16 COMPLEX 001 4 x 64 COMPLEX 010 256 COMPLEX 011 1024 COMPLEX 100 8 X 64 REAL 101 2 X 256 REAL 110 2 X 1024 REAL 111 NOT USED 3 0 SHIFT 3 PLACES AFTER PASS1 1 ALWAYS SHIFT 2 PLACES 5:4 00 RECTANGULAR 01 HAMMING WINDOW 10 BLACKMAN-HARRIS 11 INVERSE TRANSFORM 8:6 000 NO OVERLAP 001 50% OVERLAP 010 50% OVERLAP AND DIS ÷ 2 011 75% OVERLAP 100 75% OVERLAP AND DIS ÷ 4 101 DUAL SOURCE, NO OVERLAP 110 DUAL SOURCE, 50% OVERLAP 111 DUAL SOURCE, 75% OVERLAP 10:9 00 SINGLE DEVICE 01 N DEVICES, CONCURRENT I/O 10 N DEVICES, LOAD-TRANS-DUMP 11 SPECIAL MULTIPLE TRANSFORM 11 00 DAV NOT DELAYED 01 24 CLK DAV DELAY 12 0 INEN EDGE ACTIVATED 1 INEN IS SIMPLE ENABLE 14:13 00 O/P FIRST QUARTER 01 O/P FIRST HALF 10 O/P LAST HALF 11 O/P ALL RESULTS 15 0 NORMAL DAV 1 KEEP DAV ACTIVE TILL INEN |
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