MT9V024 datasheet(16/62 Pages) ONSEMI

16 / 62 page

MT9V024_DSRev. G Pub. 4/15 EN

©Semiconductor Components Industries, LLC, 2015.

MT9V024: 1/3-Inch Wide-VGA Digital Image Sensor

Serial Bus Description

Registers are written to and read from the MT9V024 through the two-wire serial inter-

face bus. The MT9V024 is a serial interface slave with four possible IDs (0x90, 0x98, 0xB0

and 0xB8) determined by the S_CTRL_ADR0 and S_CTRL_ADR1 input pins. Data is

transferred into the MT9V024 and out through the serial data (SDATA) line. The SDATA

line is pulled up to VDD off-chip by a 1.5K resistor. Either the slave or master device can

pull the SDATA line down—the serial interface protocol determines which device is

allowed to pull the SDATA line down at any given time. The registers are 16-bit wide, and

can be accessed through 16- or 8-bit two-wire serial interface sequences.

Protocol

The two-wire serial interface defines several different transmission codes, as shown in

the following sequence:

1. a start bit

2. the slave device 8-bit address

3. a(n) (no) acknowledge bit

4. an 8-bit message

5. a stop bit

Start Bit

The start bit is defined as a HIGH-to-LOW transition of the data line while the clock line

is HIGH.

Slave Address

The 8-bit address of a two-wire serial interface device consists of 7 bits of address and

1 bit of direction. A “0” in the LSB of the address indicates write mode, and a “1” indi-

cates read mode. As indicated above, the MT9V024 allows four possible slave addresses

determined by the two input pins, S_CTRL_ADR0 and S_CTRL_ADR1.

Acknowledge Bit

The master generates the acknowledge clock pulse. The transmitter (which is the master

when writing, or the slave when reading) releases the data line, and the receiver indi-

cates an acknowledge bit by pulling the data line LOW during the acknowledge clock

pulse.

No-Acknowledge Bit

The no-acknowledge bit is generated when the data line is not pulled down by the

receiver during the acknowledge clock pulse. A no-acknowledge bit is used to terminate

a read sequence.

Stop Bit

The stop bit is defined as a LOW-to-HIGH transition of the data line while the clock line

is HIGH.

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