AS0260CSSC28SUD20 datasheet(77/83 Pages) ONSEMI

77 / 83 page

AS0260 DS Rev. G Pub. 5/15 EN

©Semiconductor Components Industries, LLC, 2015.

AS0260: 1/6-Inch 1080P High-Definition (HD) System-On-A-Chip (SOC) Digi-

tal Image Sensor

Notes:

1. VIH/VIL restrictions apply.

Figure 44:

Parallel Pixel Bus Timing Diagram

Notes:

1. FRAME_VALID leads LINE_VALID by 6 PIXCLKs.

2. FRAME_VALID trails LINE_VALID by 6 PIXCLKs.

Table 26:

AC Electrical Characteristics

EXTCLK = 24 MHz; REG_IN0 = VDD_PHY = 1.8V; VDD_IO = VAA = VAA_PIX = 2.8V; TJ = 25°C unless otherwise stated

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Note

fEXTCLK

External clock frequency

MHz

DEXTCLK

External input clock duty cycle

tJITTER

External input clock jitter

–

500

–

fPIXCLK

Pixel clock frequency

MHz

tRPIXCLK

Pixel clock rise time

CLOAD =25pf

–

tFPIXCLK

Pixel clock fall time

CLOAD =25pf

–

tPD

PIXCLK to data valid

–

tPFH

PIXCLK to FV HIGH

–

tPFL

PIXCLK to FV LOW

–

tPLH

PIXCLK to LV HIGH

–

tPLL

PIXCLK to LV LOW

–

PIXCLK slew rate

Programmable Slew = 7

VDD_IO = 2.8V, CLOAD =25pf

–

V/ns

VDD_IO = 1.8V, CLOAD =25pf

–

V/ns

Programmable Slew = 4

VDD_IO = 2.8V, CLOAD =25pf

–

V/ns

VDD_IO = 1.8V, CLOAD =25pf

–

V/ns

Programmable Slew = 0

VDD_IO = 2.8V, CLOAD =25pf

–

V/ns

VDD_IO = 1.8V, CLOAD =25pf

–

V/ns

Output slew rate

Programmable Slew = 7

VDD_IO = 2.8V, CLOAD =25pf

–

V/ns

VDD_IO = 1.8V, CLOAD =25pf

–

V/ns

Programmable Slew = 4

VDD_IO = 2.8V, CLOAD =25pf

–

V/ns

VDD_IO = 1.8V, CLOAD =25pf

–

V/ns

Programmable Slew = 0

VDD_IO = 2.8V, CLOAD =25pf

–

V/ns

VDD_IO = 2.8V, CLOAD =25pf

–

V/ns

PIXCLK

FRAME_VALID,

LINE_VALID

tPFL

tPLL

tPFH

tPLH

tPD

DOUT[7:0]

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