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LMZ12003EXT датащи(PDF) 13 Page - Texas Instruments |
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LMZ12003EXT датащи(HTML) 13 Page - Texas Instruments |
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13 / 29 page ![]() LMZ12003EXT www.ti.com SNVS663H – JUNE 2010 – REVISED AUGUST 2015 Typical Application (continued) 8.2.2 Detailed Design Procedure The LMZ12003EXT is fully supported by WEBENCH and offers the following: Component selection, electrical and thermal simulations as well as the build-it board for a reduction in design time. The following list of steps can be used to manually design the LMZ12003EXT application. 1. Select minimum operating VIN with enable divider resistors 2. Program VO with divider resistor selection 3. Program turnon time with soft-start capacitor selection 4. Select CO 5. Select CIN 6. Set operating frequency with RON 7. Determine module dissipation 8. Layout PCB for required thermal performance 8.2.2.1 Enable Divider, RENT and RENB Selection The enable input provides a precise 1.18-V band-gap rising threshold to allow direct logic drive or connection to a voltage divider from a higher enable voltage such as Vin. The enable input also incorporates 90 mV (typical) of hysteresis resulting in a falling threshold of 1.09 V. The maximum recommended voltage into the EN pin is 6.5 V. For applications where the midpoint of the enable divider exceeds 6.5 V, a small Zener can be added to limit this voltage. The function of this resistive divider is to allow the designer to choose an input voltage below which the circuit will be disabled. This implements the feature of programmable undervoltage lockout. This is often used in battery powered systems to prevent deep discharge of the system battery. It is also useful in system designs for sequencing of output rails or to prevent early turnon of the supply as the main input voltage rail rises at power- up. Applying the enable divider to the main input rail is often done in the case of higher input voltage systems where a lower boundary of operation must be established. In the case of sequencing supplies, the divider is connected to a rail that becomes active earlier in the power-up cycle than the LMZ12003EXT output rail. The two resistors must be chosen based on the following ratio: RENT / RENB = (VIN UVLO / 1.18 V) – 1 (1) The LMZ12003EXT demonstration and evaluation boards use 11.8 k Ω for RENB and 32.4 kΩ for RENT resulting in a rising UVLO of 4.5 V. This divider presents 5.34 V to the EN input when the divider input is raised to 20 V. 8.2.2.2 Output Voltage Selection Output voltage is determined by a divider of two resistors connected between VO and ground. The midpoint of the divider is connected to the FB input. The voltage at FB is compared to a 0.8-V internal reference. In normal operation an ON-time cycle is initiated when the voltage on the FB pin falls below 0.8 V. The main MOSFET ON- time cycle causes the output voltage to rise and the voltage at the FB to exceed 0.8 V. As long as the voltage at FB is above 0.8 V, ON-time cycles will not occur. The regulated output voltage determined by the external divider resistors RFBT and RFBB is: VO = 0.8 V × (1 + RFBT / RFBB) (2) Rearranging terms; the ratio of the feedback resistors for a desired output voltage is: RFBT / RFBB = (VO / 0.8 V) – 1 These resistors must be chosen from values in the range of 1.0 k Ω to 10.0 kΩ. For VO = 0.8 V the FB pin can be connected to the output directly so long as an output preload resistor remains that draws more than 20 µA. Converter operation requires this minimum load to create a small inductor ripple current and maintain proper regulation when no load is present. A feed-forward capacitor is placed in parallel with RFBT to improve load step transient response. Its value is usually determined experimentally by load stepping between DCM and CCM conduction modes and adjusting for best transient response and minimum output ripple. Table 1 lists the values for RFBT , RFBB , CFF and RON. Copyright © 2010–2015, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: LMZ12003EXT |
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