ML2340CCSSLASH5 datasheet(7/12 Pages) MICRO-LINEAR

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ML2340, ML2350

1.0 FUNCTIONAL DESCRIPTION

1.1 D/A CONVERTER

The D/A converter is implemented using an array of equal

current sources that are decoded semi-linearly for the four

most significant bits to improve differential linearity and to

reduce output glitch around major carries. See Figure 4.

The input voltage reference of the D/A converter is the

difference between VREF IN and AGND. This difference

voltage is converted to a reference current using an

internal resistor to set up the appropriate current level in

Figure 4. D/A Converter Implementation

4-BIT

DIVIDER

DACOUT

VCC

1.2 SINGLE-SUPPLY vs. DUAL-SUPPLY OPERATION

ML2340 and ML2350 can be powered from a single

supply ranging from 4.5V to 13.2V or dual supplies

ranging from ±2.25V to ±6.6V.

The internal digital and analog circuitry is powered

between VCC and AGND. The range of DGND is

AGND - DGND - VCC – 4.5V with the logic thresholds

set between 0.8V and 2.0V above DGND (standard TTL

logic level). The range of VZS is AGND - VZS - (VCC –

2.25V).

1.3 UNIPOLAR AND BIPOLAR OUTPUT

VOLTAGE SWING

ML2340 and ML2350 can operate in either unipolar or

bipolar output voltage mode. Unipolar/bipolar mode

selection is determined by comparing the zero scale

voltage (VZS) of these devices to a precise internal

reference that is referred to AGND. VZS is ideally the

voltage that will be produced at the DAC voltage output

when the digital input data is set to all “0’s” Unipolar

mode is selected when VZS is lower than 1.00 volt, and

bipolar mode is selected when VZS is greater than 1.50

volts.

1.3.1 Unipolar Output Mode

In the unipolar mode, VOUT swings above VZS. Ideally the

00000000 code results in an output voltage of VZS, and

the 11111111 code results in an output voltage of

VFS x 255/256, where VFS is the full-scale voltage

determined by VREF IN and the gain setting.

1.3.2 Bipolar Output Mode

In the bipolar mode, VOUT swings around VZS. The input

data is in 2’s complement binary format. Ideally, the

00000000 code results in an output voltage of VZS; the

10000000 code results in an output voltage of (VZS – VFS);

and the 01111111 results in an output voltage of (VZS +

VFS 127/128), where VFS is the full scale output voltage

determined by VREF IN and the gain setting.

1.4 OUTPUT BUFFER AND GAIN SETTING

The output buffer converts the D/A output current to a

voltage output using a resistive network with proper gain

setting determined by the GAIN 0 and GAIN 1 inputs.

There are four possible gain settings for unipolar output

voltage mode and bipolar output voltage mode as listed

below:

Unipolar Output Voltage Mode

Voltage Output Swing

GAIN 1

GAIN 0

GAIN

Relative to VZS

1/4

VREF IN ¥ 1/4

1/2

VREF IN ¥

1/2

101

VREF IN ¥ 1

112

VREF IN ¥ 2

the D/A converter. The D/A converter output current is

then converted to a voltage output by an output buffer

and a resistive network. The matching among the

on-chip resistors preserves the gain accuracy between

these conversions.

The D/A converter can be used in a multiplying mode by

modulating the reference input within the specified

VREF IN range.

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