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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC16LC712-04/SS датащи(PDF) 23 Page - Microchip Technology |
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PIC16LC712-04/SS датащи(HTML) 23 Page - Microchip Technology |
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23 / 108 page  PIC16C712/716 © 1999 Microchip Technology Inc. Preliminary DS41106A-page 23 3.2 PORTB and the TRISB Register PORTB is an 8-bit wide bi-directional port. The corre- sponding data direction register is TRISB. Setting a TRISB bit (=1) will make the corresponding PORTB pin an input, (i.e., put the corresponding output driver in a hi-impedance mode). Clearing a TRISB bit (=0) will make the corresponding PORTB pin an output, (i.e., put the contents of the output latch on the selected pin). EXAMPLE 3-1: INITIALIZING PORTB BCF STATUS, RP0 ; CLRF PORTB ; Initialize PORTB by ; clearing output ; data latches BSF STATUS, RP0 ; Select Bank 1 MOVLW 0xCF ; Value used to ; initialize data ; direction MOVWF TRISB ; Set RB<3:0> as inputs ; RB<5:4> as outputs ; RB<7:6> as inputs Each of the PORTB pins has a weak internal pull-up. A single control bit can turn on all the pull-ups. This is per- formed by clearing bit RBPU (OPTION_REG<7>). The weak pull-up is automatically turned off when the port pin is configured as an output. The pull-ups are dis- abled on a Power-on Reset. FIGURE 3-3: BLOCK DIAGRAM OF RB0 PIN Data Latch RBPU(1) P VDD Q D CK Q D CK QD EN DATA BUS WR PORT WR TRIS RD TRIS RD PORT weak pull-up RD PORT RB0/INT I/O pin TTL Input Buffer Schmitt Trigger Buffer TRIS Latch Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). VSS VDD |
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