PIC16C71-04SLASHSP datasheet(83/176 Pages) MICROCHIP

83 / 176 page

DS30272A-page 83

PIC16C71X

SUBWF

Subtract W from f

Syntax:

[

label ]

SUBWF f,d

Operands:

≤ f ≤ 127

∈ [0,1]

Operation:

(f) - (W)

→ (dest)

Status Affected:

C, DC, Z

Encoding:

0010

dfff

ffff

Description:

Subtract (2’s complement method) W reg-

ister from register 'f'. If 'd' is 0 the result is

stored in the W register. If 'd' is 1 the

result is stored back in register 'f'.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

data

Write to

dest

Example 1:

SUBWF

REG1,

Before Instruction

REG1

After Instruction

REG1

1; result is positive

Example 2:

Before Instruction

REG1

After Instruction

REG1

1; result is zero

Example 3:

Before Instruction

REG1

After Instruction

REG1

0xFF

0; result is negative

SWAPF

Swap Nibbles in f

Syntax:

[

label ] SWAPF f,d

Operands:

≤ f ≤ 127

∈ [0,1]

Operation:

(f<3:0>)

→ (dest<7:4>),

(f<7:4>)

→ (dest<3:0>)

Status Affected:

None

Encoding:

1110

dfff

ffff

Description:

The upper and lower nibbles of regis-

ter 'f' are exchanged. If 'd' is 0 the

result is placed in W register. If 'd' is 1

the result is placed in register 'f'.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

data

Write to

dest

Example

SWAPF

REG,

Before Instruction

REG1

0xA5

After Instruction

REG1

0xA5

0x5A

TRIS

Load TRIS Register

Syntax:

[

label]

TRIS

Operands:

≤ f ≤ 7

Operation:

(W)

→ TRIS register f;

Status Affected: None

Encoding:

0000

0110

0fff

Description:

The instruction is supported for code

compatibility with the PIC16C5X prod-

ucts. Since TRIS registers are read-

able and writable, the user can directly

address them.

Words:

Cycles:

Example

To maintain upward compatibility

with future PIC16CXX products, do

not use this instruction.

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