PIC16C71-04SLASHSP datasheet(78/176 Pages) MICROCHIP

78 / 176 page

PIC16C71X

DS30272A-page 78

IORWF

Inclusive OR W with f

Syntax:

[

label ]

IORWF

f,d

Operands:

≤ f ≤ 127

∈ [0,1]

Operation:

(W) .OR. (f)

→ (dest)

Status Affected:

Encoding:

0100

dfff

ffff

Description:

Inclusive OR the W register with regis-

ter 'f'. If 'd' is 0 the result is placed in

the W register. If 'd' is 1 the result is

placed back in register 'f'.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

'f'

Process

data

Write to

dest

Example

IORWF

RESULT, 0

Before Instruction

RESULT =

0x13

0x91

After Instruction

RESULT =

0x13

0x93

MOVF

Move f

Syntax:

[

label ]

MOVF f,d

Operands:

≤ f ≤ 127

∈ [0,1]

Operation:

(f)

→ (dest)

Status Affected:

Encoding:

1000

dfff

ffff

Description:

The contents of register f is moved to

a destination dependant upon the sta-

tus of d. If d = 0, destination is W reg-

ister. If d = 1, the destination is ﬁle

ﬁle register since status ﬂag Z is

affected.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

'f'

Process

data

Write to

dest

Example

MOVF

FSR,

After Instruction

W = value in FSR register

= 1

MOVLW

Move Literal to W

Syntax:

[

label ]

MOVLW k

Operands:

≤ k ≤ 255

Operation:

→ (W)

Status Affected:

None

Encoding:

00xx

kkkk

Description:

The eight bit literal 'k' is loaded into W

. The don’t cares will assemble

as 0’s.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

literal 'k'

Process

data

Write to

Example

MOVLW

0x5A

After Instruction

0x5A

MOVWF

Move W to f

Syntax:

[

label ]

MOVWF

Operands:

≤ f ≤ 127

Operation:

(W)

→ (f)

Status Affected:

None

Encoding:

0000

1fff

ffff

Description:

Move data from W register to register

'f'

Words:

Cycles:

Q Cycle Activity:

Decode

Read

'f'

Process

data

Write

Example

MOVWF

OPTION_REG

Before Instruction

OPTION =

0xFF

0x4F

After Instruction

OPTION =

0x4F

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