PIC18F010 datasheet(57/176 Pages) MICROCHIP

57 / 176 page

 2001 Microchip Technology Inc.

Preliminary

DS41142A-page 55

PIC18F010/020

7.0

8 X 8 HARDWARE MULTIPLIER

7.1

Introduction

An 8 x 8 hardware multiplier is included in the ALU of

the PIC18F010/020 devices. By making the multiply a

hardware operation, it completes in a single instruction

cycle. This is an unsigned multiply that gives a 16-bit

result. The result is stored into the 16-bit product regis-

ter pair (PRODH:PRODL). The multiplier does not

affect any flags in the ALUSTA register.

Making the 8 x 8 multiplier execute in a single cycle

gives the following advantages:

• Higher computational throughput

• Reduces code size requirements for multiply

algorithms

The performance increase allows the device to be used

in applications previously reserved for Digital Signal

Processors.

Table 7-1 shows a performance comparison between

enhanced devices using the single cycle hardware mul-

tiply, and performing the same function without the

hardware multiply.

TABLE 7-1:

PERFORMANCE COMPARISON

Routine

Multiply Method

Program

Memory

(Words)

Cycles

(Max)

Time

@ 40 MHz

@ 10 MHz

@ 4 MHz

8 x 8 unsigned

Without hardware multiply

6.9

µs

27.6

µs69 µs

Hardware multiply

100 ns

400 ns

µs

8 x 8 signed

Without hardware multiply

9.1

µs

36.4

µs91 µs

Hardware multiply

600 ns

2.4

µs6 µs

16 x 16 unsigned

Without hardware multiply

242

24.2

µs

96.8

µs242 µs

Hardware multiply

2.4

µs9.6 µs24 µs

16 x 16 signed

Without hardware multiply

254

25.4

µs102.6 µs254 µs

Hardware multiply

3.6

µs

14.4

µs36 µs

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