TLS820F0 datasheet(6/41 Pages) INFINEON

6 / 41 page

Data Sheet

Rev. 1.1, 2015-07-27

TLS820F0

Pin Configuration

3.1

Pin Assignment TLS820F0ELV50 and TLS820F0ELV33

Figure 3

Pin Configuration

3.2

Pin Definitions and Functions TLS820F0ELV50 and TLS820F0ELV33

Symbol

Function

Input

It is recommended to place a small ceramic capacitor (e.g. 100 nF) to GND, close

to the IC terminals, in order to compensate line influences. See also Chapter 6.2.1

2, 4, 6

n.c.

not connected

Leave open or connect to GND

3EN

Enable (integrated pull-down resistor)

Enable the IC with high level input signal;

Disable the IC with low level input signal;

5GND

Ground

7WI

Watchdog Input (integrated pull-down resistor)

Serve Watchdog with trigger input signal (usable for microcontroller monitoring)

8RADJ

Reset Threshold Adjustment

Connect to GND to use standard value;

Connect an external voltage divider to adjust reset threshold

9DT1

Delay Timing 1 (integrated pull-down resistor)

Connect to GND or Q to select Reset timing acc. to Table 8

Connect to GND or Q to select Watchdog timing acc. to Table 11

DT2

Delay Timing 2 (integrated pull-down resistor)

Connect to GND or Q to select Watchdog timing acc. to Table 11

Reset Output (integrated pull-up resistor to Q)

Open collector output;

Leave open if the reset function is not needed

Watchdog Output (integrated pull-up resistor to Q)

Open collector output;

Leave open if the watchdog function is not needed

PG -

SSOP14 _Pin Ou t.vs d

n.c.

GND

n.c.

DT1

DT2

RADJ

SSOP-14

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