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FX929B датащи(PDF) 43 Page - CML Microcircuits |
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FX929B датащи(HTML) 43 Page - CML Microcircuits |
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43 / 48 page ![]() 4-Level FSK Modem Data Pump FX929B © 1997 Consumer Microcircuits Limited 43 D/929B/1 Operating Characteristics For the following conditions unless otherwise specified: Xtal Frequency = 4.9152MHz, Symbol Rate = 4800 symbols/sec, Noise Bandwidth = 0 to 9600Hz, VDD = 3.3V to 5.0V, Tamb = - 40°C to +85°C. Notes Min. Typ. Max. Units DC Parameters IDD (VDD = 5.0V) 1 4.0 10.0 mA IDD (VDD = 3.3V) 1 2.5 6.3 mA IDD (Powersave Mode, VDD = 5.0V) 1 1.5 mA IDD (Powersave Mode, VDD = 3.3V) 1 0.6 mA AC Parameters Tx Output TXOP Impedance 2 1.0 2.5 k Ω Signal Level TXIMP = 0 3 0.8 1.0 1.2 V pk-pk Signal Level TXIMP = 1 3 0.88 1.1 1.32 V pk-pk Output DC Offset wrt VDD/2 4 -0.25 +0.25 V Rx Input RXIN Impedance (at 100Hz) 10.0 M Ω RXIN Amp Voltage Gain (I/P = 1mVrms at 100Hz) 300 V/V Input Signal Level 5 0.7 1.0 1.3 V pk-pk DC Offset wrt VDD/2 5 -0.5 +0.5 V Xtal/Clock Input 'High' Pulse Width 6 40.0 ns 'Low' Pulse Width 6 40.0 ns Input Impedance (at 100Hz) 10.0 M Ω Inverter Gain (I/P = 1mVrms at 100Hz) 20.0 dB µC Interface Input Logic "1" Level 7, 8 70% VDD Input Logic "0" Level 7, 8 30% VDD Input Leakage Current (Vin = 0 to VDD) 7, 8 5.0 +5.0 µA Input Capacitance 7, 8 10.0 pF Output Logic "1" Level (lOH = 120µA) 8 92% VDD Output Logic "0" Level (lOL = 360µA) 8, 9 8% VDD 'Off' State Leakage Current (Vout = VDD) 9 10.0 µA Notes: 1. At 25 °C. Not including any current drawn from the modem pins by external circuitry other than the Xtal oscillator. 2. Small signal impedance, at VDD = 5.0V and Tamb = 25°C. 3. Measured after the external RC filter (R4/C5) for a "+3 +3 -3 -3...." symbol sequence, at VDD = 5.0V and Tamb = 25°C (Tx output level is proportional to VDD). 4. Measured at the TXOP pin with the modem in the Tx idle mode. 5. For optimum performance, measured at RXFB pin, for a "...+3 +3 -3 -3..." symbol sequence, at VDD = 5.0V and Tamb = 25°C, TXIMP = 0 or 1. The optimum level and DC offset values are proportional to VDD. 6. Timing for an external input to the CLOCK/XTAL pin. 7. WRN, RDN, CSN, A0 and A1 pins. 8. D0 - D7 pins. 9. IRQN pin. |
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