RESET Output

The MAX791’s RESET output ensures that the µP pow-

ers up in a known state, and prevents code-execution

errors during power-down or brownout conditions.

The RESET output is active low, and typically sinks

3.2mA at 0.1V saturation voltage in its active state.

When deasserted, RESET sources 1.6mA at typically

an external 10k

Ω pull-down resistor on RESET ensures

output switch reduces accordingly, increasing the

Ω pull-down

resistor ensures the parallel combination of switch plus

resistor is around 10k

Ω and the output saturation volt-

age is below 0.4V while sinking 40µA. When using a

10k

Ω external pull-down resistor, the high state for the

tery voltages

≥ 2V connected to VBATT, RESET

RESET will be asserted during the following conditions:

2) MR < 1.25V (typ)

rises above 4.65V or after MR has exceeded

1.25V.

The MAX791 battery-switchover comparator does not

affect RESET assertion. However, RESET is asserted in

reset threshold to enter this mode.

Watchdog Function

The watchdog monitors µP activity via the Watchdog

Input (WDI). If the µP becomes inactive, WDO and

WDPO are asserted. To use the watchdog function,

connect WDI to a bus line or µP I/O line. If WDI remains

high or low for longer than the watchdog timeout period

(1.6sec nominal), WDPO and WDO are asserted, indi-

cating a software fault condition (see

Watchdog Output

and

Watchdog-Pulse Output sections).

Watchdog Input

A change of state (high to low, low to high, or a mini-

mum 100ns pulse) at WDI during the watchdog period

resets the watchdog timer. The watchdog default time-

out is 1.6sec. Select alternative timeout periods by con-

necting an external capacitor from SWT to GND (see

Selecting an Alternative Watchdog Timeout section).

To disable the watchdog function, leave WDI floating.

An internal resistor network (100k

Ω equivalent imped-

ance at WDI) biases WDI to approximately 1.6V.

Internal comparators detect this level and disable the

old, the watchdog function is disabled and WDI is dis-

connected from its internal resistor network, thus

becoming high impedance.

Watchdog Output

WDO remains high if there is a transition or pulse at

WDI during the watchdog-timeout period. The watch-

dog function is disabled and WDO is a logic high when

is enabled, or WDI is an open circuit. In watchdog

mode, if no transition occurs at WDI during the watch-

Microprocessor Supervisory Circuit

_______________________________________________________________________________________

9

WDPO

WDI

70ns

1.6sec

100ns MIN

WDO

Figure 5. WDI,

–

W

—

D

—

O

–

and

–

W

—

D

—

P

—

O

–

MAX791

RESET

10k

TO

µP RESET

15

Figure 4. Adding an external pull-down resistor ensures

–

R

—

E

—

S

—

E

—

T

–