UCD3138128 datasheet(20/80 Pages) TI

20 / 80 page

Error ADC

(Front End)

Filter

Digital

PWM

EAP

EAN

DPWMA

DPWMB

UCD3138128, UCD3138A64

SLUSBZ8A – JUNE 2014 – REVISED SEPTEMBER 2014

www.ti.com

Feature Description (continued)

Table 1. Interrupt Priority Table (continued)

MODULE COMPONENT OR

NAME

DESCRIPTION

PRIORITY

“Prebias complete”, “Ramp Delay Complete”, “Ramp

Complete”, “Load Step Detected”,

FE1_INT

Front End 1

“Over-Voltage Detected”, “EADC saturated”

“Prebias complete”, “Ramp Delay Complete”, “Ramp

Complete”, “Load Step Detected”,

FE2_INT

Front End 2

“Over-Voltage Detected”, “EADC saturated”

PWM3_INT

16-bit Timer PWM 3

16-bit Timer PWM3 counter overflow or compare interrupt

PWM2_INT

16-bit Timer PWM 2

16-bit Timer PWM2 counter Overflow or compare interrupt

PWM1_INT

16-bit Timer PWM 1

16-bit Timer PWM1 counter overflow or compare interrupt

PWM0_INT

16-bit timer PWM 0

16-bit Timer PWM0 counter overflow or compare interrupt

OVF24_INT

24-bit Timer Control

24-bit Timer counter overflow interrupt

CAPTURE_1_INT

24-bit Timer Control

24-bit Timer capture 1 interrupt

Reserved for future use

CAPTURE_0_INT

24-bit Timer Control

24-bit Timer capture 0 interrupt

COMP_0_INT

24-bit Timer Control

24-bit Timer compare 0 interrupt

Constant Power Constant Current

Mode switched in CPCC module Flag needs to be read for

CPCC_RTC_INT

or Real Time Clock Output

details. RTC timer output generates an interrupt.

ADC_CONV_INT

12-bit ADC Control

ADC end of conversion interrupt

Analog comparator interrupts, Over-Voltage detection,

Under-Voltage detection,

FAULT_INT

Fault Mux Interrupt

LLM load step detection

DPWM3

Same as DPWM1

DPWM2

Same as DPWM1

1) Every (1-256) switching cycles

DPWM1

2) Fault Detection

3) Mode switching

DPWM0

Same as DPWM1

EXT_FAULT_INT

External Faults

Fault pin interrupt

SYS_SSI_INT

System Software

System software interrupt

31 (highest)

9.3.2 Peripherals

9.3.2.1

Digital Power Peripherals

At the core of the UCD3138x controller are 3 Digital Power Peripherals (DPP). Each DPP can be configured to

drive from one to eight DPWM outputs. Each DPP consists of:

•

Differential input error ADC (EADC) with sophisticated controls

•

Hardware accelerated digital 2-pole/2-zero PID based filter

•

Digital PWM module with support for a variety of topologies

These can be connected in many different combinations, with multiple filters and DPWMs. They are capable of

supporting functions like input voltage feed forward, current mode control, and constant current/constant power,

etc.. The simplest configuration is shown in the following figure:

Submit Documentation Feedback

Product Folder Links: UCD3138128 UCD3138A64

UCD3138128 датащи(PDF) 20 Page - Texas Instruments

UCD3138128 датащи(HTML) 20 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

датащи скачать

ссылки URL