Time (100 s/div)

m

V

O

I

O

1 mA

150 mA

Time (100 s/div)

m

V

O

V

I

10

10M

Frequency (Hz)

90

80

70

60

50

40

30

20

10

0

100

1k

10k

100k

1M

I = 30 mA

I = 150 mA

O

O

10

10M

Frequency (Hz)

100

10

1

0.1

0.01

0.001

100

1k

10k

100k

1M

5 V

2.8 V

1.2 V

TLV707, TLV707P

www.ti.com

SBVS153D – FEBRUARY 2011 – REVISED JANUARY 2015

Although an input capacitor is not required for stability, good analog design practice is to connect a 0.1-

μF to

1.0-

μF, low ESR capacitor across the IN pin and GND pin of the regulator. This capacitor counteracts reactive

input sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor

may be necessary if large, fast rise-time load transients are anticipated, or if the device is not located close to the

power source. If source impedance is more than 2-

Ω, a 0.1-μF input capacitor may be necessary to ensure

stability.

9.2.2.2 Dropout Voltage

PMOS device functions similar to a resistor in dropout.

9.2.2.3 Transient Response

As with any regulator, increasing the size of the output capacitor reduces over- and undershoot magnitude but

increases the duration of the transient response.

9.2.3 Application Curves

Figure 60. Power-Supply Ripple Rejection vs Frequency

Figure 61. Output Spectral Noise Density vs Frequency

Figure 62. Load Transient Response

Figure 63. Line Transient Response

Copyright © 2011–2015, Texas Instruments Incorporated

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